Abstract: In various embodiments, a washable mat system comprises a top cover removably attached to a bottom pad. The top cover comprises layers of material, including a top layer with a tufted loop pile, a water-resistant internal layer, and a bottom knit surface. The top cover is sufficiently malleable to be folded, rolled, compressed, and withstand multiple wash and dry cycles while maintaining material stability. The bottom pad also comprises layers of material, including a top layer to removably attach to the bottom knit surface of the top cover, an internal cushioning layer, and a non-slip bottom surface.

Abstract: In general, in one aspect, a method includes forming a spacer layer over a substrate having patterned stacks formed therein and trenches between the patterned stacks. A sacrificial polysilicon layer is deposited over the substrate to fill the trenches. A patterning layer is deposited over the substrate and patterned to define contact regions over at least a portion of the trenches. The sacrificial polysilicon layer is etched using the patterned patterning layer to form open regions.

Abstract: Methods for forming metal contacts to silicon substrates in semiconductor devices for contact diameters less than 60 nm and the devices formed from such processes are described. The methods includes the steps of pre-cleaning the silicon surface where the metal contact will be formed, depositing a silicide material and a sacrificial liner, forming the silicide material, removing or stripping the non-reacted portions of the silicide material non-reacted portions of the sacrificial liner, optionally performing an additional oxide clean, and depositing the liner and the metal for the contact. Such a process allows the formation of W contacts with dimension of 60 nm and below without a significant amount of defects.

Abstract: In general, in one aspect, a method includes forming a spacer layer over a substrate having patterned stacks formed therein and trenches between the patterned stacks. A sacrificial polysilicon layer is deposited over the substrate to fill the trenches. A patterning layer is deposited over the substrate and patterned to define contact regions over at least a portion of the trenches. The sacrificial polysilicon layer is etched using the patterned patterning layer to form open regions.

Abstract: In one embodiment of the invention, a NOR Flash memory includes a buried source rail that directly connects to a source strap. Furthermore, a drain plug connects directly to a bit line.

Abstract: A method and apparatus to form a high-concentration, indium-fluorine retrograde well within a substrate. The indium-fluorine retrograde well includes an indium concentration greater than about 3E18/cm3.

Abstract: A method and apparatus to form a high-concentration, indium-fluorine retrograde well within a substrate. The indium-fluorine retrograde well includes an indium concentration greater than about 3E18/cm3.

Abstract: A method and apparatus to form a high-concentration, indium-fluorine retrograde well within a substrate. The indium-fluorine retrograde well includes an indium concentration greater than about 3E18/cm3.

Abstract: A method and apparatus to form a high-concentration, indium-fluorine retrograde well within a substrate. The indium-fluorine retrograde well includes an indium concentration greater than about 3E18/cm3.