Patents by Inventor Maxim Y. Shevtsov

Maxim Y. Shevtsov has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Graphics rendering using a hierarchical acceleration structure
    Patent number: 10163187
    Abstract: A hierarchical acceleration structure may be built for graphics processing using a 32 bit format. In one embodiment, the acceleration structure may be a k-d tree, but other acceleration structures may be used as well. 64 bit offsets are only used when 64 bit offsets are needed.
    Type: Grant
    Filed: October 30, 2009
    Date of Patent: December 25, 2018
    Assignee: Intel Corproation
    Inventors: Alexei Soupikov, Maxim Y. Shevtsov, Alexander V. Reshetov
  • Graphics Rendering Using A Hierarchical Acceleration Structure
    Publication number: 20120268483
    Abstract: A hierarchical acceleration structure may be built for graphics processing using a 32 bit format. In one embodiment, the acceleration structure may be a k-d tree, but other acceleration structures may be used as well. 64 bit offsets are only used when 64 bit offsets are needed.
    Type: Application
    Filed: October 30, 2009
    Publication date: October 25, 2012
    Inventors: Alexei Soupikov, Maxim Y. Shevtsov, Alexander V. Reshetov
  • Anti-aliasing techniques for image processing
    Publication number: 20090322781
    Abstract: Samples may be taken to determine illumination gradients across subdivided areas of a pixel to determine which pixels are more likely to experience aliasing. More samples are then taken in the regions that are more likely to experience aliasing. The determination of those regions that are more likely to experience aliasing may be completed automatically.
    Type: Application
    Filed: June 30, 2008
    Publication date: December 31, 2009
    Inventors: Mikhail Letavin, Alexei Soupikov, Maxim Y. Shevtsov