Patents by Inventor Maxime Lemenager

Maxime Lemenager has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240321946
    Abstract: An integrated device that includes: a substrate; a metal barrier layer above the substrate; a layer including a porous region of anodized metal having a plurality of substantially straight pores that extend from a top surface of the porous region, perpendicularly to the top surface of the porous region, towards the metal barrier layer so as to reach the metal barrier layer, wherein the porous region includes a zone of pores that open onto the metal barrier layer surrounded by peripheral pores that are plugged up at their bottom ends by an oxide plug of the metal barrier, and the porous region further includes: an island of pores plugged up at their bottom end by an oxide plug of the metal barrier, and/or a protuberance of pores plugged up at their bottom end by an oxide plug of the metal barrier.
    Type: Application
    Filed: March 22, 2024
    Publication date: September 26, 2024
    Inventors: Florent LALLEMAND, François LECORNEC, Maxime LEMENAGER, Florent TANAY
  • Patent number: 12054838
    Abstract: A semiconductor device that includes a porous anodic region for embedding a structure. The porous anodic region is defined by a ductile hard mask. The ductility of the hard mask reduces the potential for the hard mask to crack during the formation by anodization of the porous anodic region. The ductile hard mask may be a metal. The metal may be selected to form a stable oxide when exposed to the anodization electrolyte thereby enabling the hard mask to self-repair if a crack occurs during the anodization process.
    Type: Grant
    Filed: October 20, 2020
    Date of Patent: August 6, 2024
    Assignees: MURATA MANUFACTURING CO., LTD, COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Frédéric Voiron, Julien El Sabahy, Maxime Lemenager, Guy Parat
  • Publication number: 20240178183
    Abstract: A method for obtaining an integrated device that includes: forming a metal barrier layer above a substrate; forming an anodizable metal layer on the metal barrier layer; anodizing a first region and a second region of the anodizable metal layer to obtain respectively a first porous region and a second porous region both having a plurality of substantially straight pores that extend from a top surface of the porous region towards the metal barrier layer; forming an etching mask above at least the first porous region having an opening above the second porous region; and etching bottom ends of pores of the second porous region through the opening of the etching mask to obtain pores that form a device region, and pores in the first porous region that form a dicing line, the integrated device being delimited at least by the dicing line.
    Type: Application
    Filed: November 27, 2023
    Publication date: May 30, 2024
    Inventors: Florent LALLEMAND, François LE CORNEC, Maxime LEMENAGER, Florent TANAY
  • Publication number: 20210032766
    Abstract: A semiconductor device that includes a porous anodic region for embedding a structure. The porous anodic region is defined by a ductile hard mask. The ductility of the hard mask reduces the potential for the hard mask to crack during the formation by anodization of the porous anodic region. The ductile hard mask may be a metal. The metal may be selected to form a stable oxide when exposed to the anodization electrolyte thereby enabling the hard mask to self-repair if a crack occurs during the anodization process.
    Type: Application
    Filed: October 20, 2020
    Publication date: February 4, 2021
    Inventors: Frédéric Voiron, Julien El Sabahy, Maxime Lemenager, Guy Parat