Patents by Inventor Maximino Aguilar, Jr.

Maximino Aguilar, Jr. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7475257
    Abstract: A system and method are provided to dedicate one or more processors in a multiprocessing system to performing encryption functions. When the system initializes, one of the synergistic processing unit (SPU) processors is configured to run in a secure mode wherein the local memory included with the dedicated SPU is not shared with the other processors. One or more encryption keys are stored in the local memory during initialization. During initialization, the SPUs receive nonvolatile data, such as the encryption keys, from nonvolatile register space. This information is made available to the SPU during initialization before the SPUs local storage might be mapped to a common memory map. In one embodiment, the mapping is performed by another processing unit (PU) that maps the shared SPUs' local storage to a common memory map.
    Type: Grant
    Filed: September 25, 2003
    Date of Patent: January 6, 2009
    Assignee: International Business Machines Corporation
    Inventors: Maximino Aguilar, Jr., David Craft, Michael Norman Day, Akiyuki Hatakeyama, Harm Peter Hofstee, Masakazu Suzuoki
  • Publication number: 20080301695
    Abstract: A computer system's multiple processors are managed as devices. The operating system accesses the multiple processors using processor device modules loaded into the operating system to facilitate a communication between an application requesting access to a processor and the processor. A device-like access is determined for accessing each one of the processors similar to device-like access for other devices in the system such as disk drives, printers, etc. An application seeking access to a processor issues device-oriented instructions for processing data, and in addition, the application provides the processor with the data to be processed. The processor processes the data according to the instructions provided by the application.
    Type: Application
    Filed: July 19, 2008
    Publication date: December 4, 2008
    Applicant: International Business Machines Corporation
    Inventors: Maximino Aguilar, JR., Michael Norman Day, Mark Richard Nutter, James Michael Stafford
  • Patent number: 7421453
    Abstract: Asynchronously traversing a disjoint linked data structure is presented. A synergistic processing unit (SPU) includes a handler that works in conjunction with a memory flow controller (MFC) to traverse a disjoint linked data structure. The handler compares a search value with a node value, and provides the MFC with an effective address of the next node to traverse based upon the comparison. In turn, the MFC retrieves the corresponding node data from system memory and stores the node data in the SPU's local storage area. The MFC stalls processing and sends an asynchronous event interrupt to the SPU which, as a result, instructs the handler to retrieve and compare the latest node data in the local storage area with the search value. The traversal continues until the handler matches the search value with a node value or until the handler determines a failed search.
    Type: Grant
    Filed: August 16, 2005
    Date of Patent: September 2, 2008
    Assignee: International Business Machines Corporation
    Inventors: Maximino Aguilar, Jr., Michael Norman Day, Mark Richard Nutter
  • Patent number: 7415703
    Abstract: A processing unit (PU) retrieves a file from system memory and loads it into its internal memory. The PU extracts a processor type from the file's header which identifies whether the file should execute on the PU or a synergistic processing unit (SPU). If an SPU should execute the file, the PU DMA's the file to the SPU for execution. In one embodiment, the file is a combined file which includes both PU and SPU code. In this embodiment, the PU identifies one or more section headers included in the file which indicates embedded SPU code within the combined file. In this embodiment, the PU extracts the SPU code from the combined file and DMA's the extracted code to an SPU for execution.
    Type: Grant
    Filed: September 25, 2003
    Date of Patent: August 19, 2008
    Assignee: International Business Machines Corporation
    Inventors: Maximino Aguilar, Jr., Alex Chunghen Chow, Michael Norman Day, Michael Stan Gowen, Mark Richard Nutter, James Xenidis
  • Patent number: 7395174
    Abstract: A computer implemented method, data processing system, and computer usable code are provided for generation of software thermal profiles for applications executing on a set of processors using thermal sampling. Sampling is performed of the thermal states of the set of processors for the set of workloads to create sampled information. A thermal index is then generated based on the sampled information.
    Type: Grant
    Filed: November 29, 2005
    Date of Patent: July 1, 2008
    Assignee: International Business Machines Corporation
    Inventors: Maximino Aguilar, Jr., Charles Ray Johns, Mark Richard Nutter, James Michael Stafford
  • Patent number: 7389508
    Abstract: A system and method for grouping processors is presented. A processing unit (PU) initiates an application and identifies the application's requirements. The PU assigns one or more synergistic processing units (SPUs) and a memory space to the application in the form of a group. The application specifies whether the task requires shared memory or private memory. Shared memory is a memory space that is accessible by the SPUs and the PU. Private memory, however, is a memory space that is only accessible by the SPUs that are included in the group. When the application executes, the resources within the group are allocated to the application's execution thread. Each group has its own group properties, such as address space, policies (i.e. real-time, FIFO, run-to-completion, etc.) and priority (i.e. low or high). These group properties are used during thread execution to determine which groups take precedence over other tasks.
    Type: Grant
    Filed: September 25, 2003
    Date of Patent: June 17, 2008
    Assignee: International Business Machines Corporation
    Inventors: Maximino Aguilar, Jr., Michael Norman Day, Mark Richard Nutter, James Xenidis
  • Patent number: 7386414
    Abstract: A computer implemented method, data processing system, and computer usable code are provided for generation of hardware thermal profiles for a set of processors. Sampling is performed of the thermal states of the set of processors during the execution of a set of workloads to create sampled information. The sampled information and thermal characteristics of the set of processors are combined and a thermal index is generated based on the sampled information and characteristics of the set of processors.
    Type: Grant
    Filed: November 29, 2005
    Date of Patent: June 10, 2008
    Assignee: International Business Machines Corporation
    Inventors: Maximino Aguilar, Jr., Charles Ray Johns, Mark Richard Nutter, James Michael Stafford
  • Patent number: 7340361
    Abstract: A method and apparatus is provided for analyzing performance of a computer or data processing system, during the time that a specified task is running on the system. The analysis is used to furnish a system user with a list of proposed hardware component upgrades that would improve system performance in various respects, each being accompanied by a parameter value indicating the improvement a particular upgrade would provide. Usefully, listed upgrades are made available over the Internet, for purchase by system users. In an embodiment directed to a method, for use with a computer system comprising a configuration of hardware components, selected hardware components are monitored as the system performs a specified task. This is done to acquire statistics representing the operation of respective selected components. The statistics are processed, to identify at least one selected component that impedes the system in performing the task.
    Type: Grant
    Filed: February 23, 2006
    Date of Patent: March 4, 2008
    Assignee: International Business Machines Corporation
    Inventors: Maximino Aguilar, Jr., David J. Erb, Michael Stan Gowen, Sidney J. Manning, James Michael Stafford
  • Patent number: 7318218
    Abstract: A system and method for using a processor thread as a debugger is presented. A computer system boots up and initiates a debugger thread. The debugger thread loads a robust, debugger operating system and executes the debugger operating system. Once the debugger thread is functioning, the debugger thread invokes an operational thread. In turn, the operational thread loads a primary operating system and may run various applications. While the operational thread executes the primary operating system and the applications, the debugger thread monitors the operational thread for proper functionality. When the operational thread crashes or terminates, the debugger thread retrieves operational data from the operational thread and provides the operational data to a software developer for analysis.
    Type: Grant
    Filed: September 25, 2003
    Date of Patent: January 8, 2008
    Assignee: International Business Machines Corporation
    Inventors: Maximino Aguilar, Jr., Sidney James Manning, Mark Richard Nutter, James Michael Stafford
  • Publication number: 20070298886
    Abstract: A mechanism is provided for configuring offline player behavior within a persistent world game. A player agent for an offline player includes an event monitor that monitors for events that occur in a persistent virtual world maintained by a game server. When a game event occurs that triggers an offline player rule, the player agent may generate game events on behalf of the offline player. The player agent may also receive messages from an offline player. The messages may include commands for adding, removing, or editing offline player rules. A message may also include a command to view a list of rules or fire a one-time execution of a rule upon receipt. Therefore, a player may contribute to the persistent virtual world even when offline by sending commands using a messaging client or Web browser.
    Type: Application
    Filed: June 21, 2006
    Publication date: December 27, 2007
    Inventors: MAXIMINO AGUILAR, JR., Charles R. Johns, Mark R. Nutter
  • Publication number: 20070265091
    Abstract: A mechanism is provided for generating event notifications for offline characters from within a persistent world online game. A player agent for an offline player includes an event monitor that monitors for events that occur in a persistent virtual world maintained by a game server. When a game event occurs that triggers an offline player rule, the player agent composes an event notification message and sends the message to the offline player. Event notification messages may include images, voice (text-to-speech), sound, or video. Offline players may receive event notifications at various messaging clients, such as personal computers and wireless telephones. A notification server may transmit the event notifications via existing communications channels, such as electronic mail, facsimile, instant messaging, text messaging, and voice communications.
    Type: Application
    Filed: April 25, 2006
    Publication date: November 15, 2007
    Inventors: MAXIMINO AGUILAR, JR., CHARLES JOHNS, MARK NUTTER
  • Patent number: 7290112
    Abstract: A system and method for virtualization of processor resources is presented. A thread is created on a processor and the processor's local memory is mapped into an effective address space. In doing so, the processor's local memory is accessible by other processors, regardless of whether the processor is running. Additional threads create additional local memory mappings into the effective address space. The effective address space corresponds to either a physical local memory or a “soft” copy area. When the processor is running, a different processor may access data that is located in the first processor's local memory from the processor's local storage area. When the processor is not running, a softcopy of the processor's local memory is stored in a memory location (i.e. locked cache memory, pinned system memory, virtual memory, etc.) for other processors to continue accessing.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: October 30, 2007
    Assignee: International Business Machines Corporation
    Inventors: Maximino Aguilar, Jr., Michael Norman Day, Mark Richard Nutter, James Xenidis
  • Patent number: 7240137
    Abstract: A system and method is provided to deliver messages to processors operating in a multi-processing environment. In a multi-processor environment, interrupts are managed by storing events in a queue that correspond to a particular support processor. A main processor decodes an interrupt and determines which support processor generated the interrupt. The main processor then determines whether a kernel or an application should process the interrupt. Interrupts such as page faults, segment faults, and alignment errors are handled by the kernel, while “informational” signals, such as stop and signal requests, halt requests, mailbox requests, and DMC tag complete requests are handled by the application. In addition, multiple identical events are maintained, and event data may be included in the interrupt using the invention described herein.
    Type: Grant
    Filed: August 26, 2004
    Date of Patent: July 3, 2007
    Assignee: International Business Machines Corporation
    Inventors: Maximino Aguilar, Jr., Michael Norman Day, Mark Richard Nutter, James Michael Stafford
  • Patent number: 7146529
    Abstract: A system and method for a processor thread acting as a system service provider is presented. A computer system boots up and initiates a service thread. The service thread is responsible for service related tasks, such as ECC checks and hardware log error checks. The service provider invokes a second thread which is used as an operational thread. The operational thread loads an operating system, a kernel, and runs various applications. While the operational thread executes, the service thread monitors the operational thread for proper functionality as well as monitoring service events. When the service thread detects a problem with either one of the service events or the operational thread, the service thread may choose to store operational data corresponding to the operational thread and terminates the operational thread.
    Type: Grant
    Filed: September 25, 2003
    Date of Patent: December 5, 2006
    Assignee: International Business Machines Corporation
    Inventors: Maximino Aguilar, Jr., Mark Richard Nutter, James Michael Stafford