Patents by Inventor Maximino Vasquez

Maximino Vasquez has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7020223
    Abstract: In a Viterbi decoder, 2n-way add-compare-select (ACS) operations are performed by sequential and/or parallel two-way ACS operations. In one embodiment, first two-way ACS operations generate an interim path metric for each of a plurality of interim states. Second two-way ACS operations generate a path metric for each of a plurality of next states. This process may be repeating for subsequent groups of bits to generate branch transitions through a trellis. A path having a lowest path metric may be selected and a decoded bit sequence determined based on the selected path. In generating the decoded bit sequence, the interim states of the selected path do not have to be used for code rates k/n when k is two or greater. The interim states may be used for code rates k/n when k=1.
    Type: Grant
    Filed: April 16, 2002
    Date of Patent: March 28, 2006
    Assignee: Intel Corporation
    Inventor: Maximino Vasquez
  • Patent number: 6912350
    Abstract: A method an apparatus for rendering DVD subpicture data on a computer system having graphics data without a loss of subpicture resolution includes inserting a key into the subpicture data during or right after decoding and storing the subpicture data in the primary graphics surface. This key indicates whether the data is graphics (GUI) information or subpicture information. The key is then examined by hardware logic in the graphics chip, allowing other hardware logic to blend DVD subpicture data with DVD video data without losing subpicture color resolution. The key may be implemented differently for different color modes of the primary surface, and may be unnecessary in certain modes.
    Type: Grant
    Filed: December 8, 1999
    Date of Patent: June 28, 2005
    Assignee: Intel Corporation
    Inventor: Maximino Vasquez
  • Patent number: 6711301
    Abstract: A method and apparatus for block-oriented pixel filtering reduces the number of hardware multipliers required for an image processing operation by increasing the speed of the pixel filter and rearranging the math operations. A sorter is employed in the line buffers so that defined groups of input pixel components are provided to the multipliers of the pixel filter. An accumulator is employed to receive products from the multipliers and assemble output pixels. The savings in gate count from reducing the number of multipliers is greater than additional costs, if any, of the sorter and other logic. The method and apparatus of the invention also simplify the addressing logic for the provision of scaling coefficients during an image processing operation.
    Type: Grant
    Filed: January 31, 2000
    Date of Patent: March 23, 2004
    Assignee: Intel Corporation
    Inventors: David Huu Tran, Maximino Vasquez, Daniel Robert Joe
  • Publication number: 20030194025
    Abstract: In a Viterbi decoder, 2n-way add-compare-select (ACS) operations are performed by sequential and/or parallel two-way ACS operations. In one embodiment, first two-way ACS operations generate an interim path metric for each of a plurality of interim states. Second two-way ACS operations generate a path metric for each of a plurality of next states. This process may be repeating for subsequent groups of bits to generate branch transitions through a trellis. A path having a lowest path metric may be selected and a decoded bit sequence determined based on the selected path. In generating the decoded bit sequence, the interim states of the selected path do not have to be used for code rates k/n when k is two or greater. The interim states may be used for code rates k/n when k=1.
    Type: Application
    Filed: April 16, 2002
    Publication date: October 16, 2003
    Applicant: Intel Corporation
    Inventor: Maximino Vasquez
  • Publication number: 20030194026
    Abstract: A Viterbi decoder and method rescale branch metrics by a minimum value of a prior state's path metric. A branch metric unit generates branch metrics from groups of bits of a received bit stream, and an ACS operation unit rescales the branch metrics and performs ACS operations to generate path metrics for the next state of the decoder. The rescaled branch metrics may be stored in branch metric registers of the ACS operation unit for use in a subsequent ACS operation. Rather than resealing path metrics within individual ACS elements, branch metric rescaling is performed outside the individual ACS elements.
    Type: Application
    Filed: April 16, 2002
    Publication date: October 16, 2003
    Applicant: Intel Corporation
    Inventor: Maximino Vasquez
  • Patent number: 6563544
    Abstract: An apparatus and method for converting computer graphics images into a format suitable for display on a TV. A flicker filter is combined with a vertical scaling filter and/or vertical overscan compensation filter to produce an interlaced image formatted for display on a TV, more efficiently than if the processes occurred sequentially. The apparatus and method are not limited to any particular filter sizes or set of filter coefficient values. The apparatus and method may be used as part of a multimedia computer system.
    Type: Grant
    Filed: September 10, 1999
    Date of Patent: May 13, 2003
    Assignee: Intel Corporation
    Inventor: Maximino Vasquez
  • Patent number: 6459455
    Abstract: A method and apparatus for deinterlacing video frames selects a location for deinterlacing, and measures motion at that location. A deinterlacing method is selected based on the measured motion. A pixel value is created for the location.
    Type: Grant
    Filed: August 31, 1999
    Date of Patent: October 1, 2002
    Assignee: Intel Corporation
    Inventors: Hong Jiang, David Huu Tran, Ernest Tinyork Tsui, Maximino Vasquez