Patents by Inventor May Chen

May Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11943936
    Abstract: A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a first transistor, a first resistive random access memory (RRAM) resistor, and a second RRAM resistor. The first resistor includes a first resistive material layer, a first electrode shared by the second resistor, and a second electrode. The second resistor includes the first electrode, a second resistive material layer, and a third electrode. The first electrode is electrically coupled to the first transistor.
    Type: Grant
    Filed: August 12, 2021
    Date of Patent: March 26, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yu-Der Chih, May-Be Chen, Yun-Sheng Chen, Jonathan Tsung-Yung Chang, Wen Zhang Lin, Chrong Jung Lin, Ya-Chin King, Chieh Lee, Wang-Yi Lee
  • Publication number: 20230253040
    Abstract: Disclosed herein are related to a memory cell including one or more programmable resistors and a control transistor. In one aspect, a programmable resistor includes a gate structure and one or more source/drain structures for forming a transistor. A resistance of the programmable resistor may be set by applying a voltage to the gate structure, while the control transistor is enabled. Data stored by the programmable resistor can be read by sensing current through the programmable resistor, while the control transistor is disabled. In one aspect, the one or more programmable resistors and the control transistor are implemented by same type of components, allowing the memory cell to be formed in a compact manner through a simplified the fabrication process.
    Type: Application
    Filed: April 17, 2023
    Publication date: August 10, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Der Chih, Jonathan Tsung-Yung Chang, Yun-Sheng Chen, May-Be Chen, Ya-Chin King, Wen Zhang Lin, Chrong Lin, Hsin-Yuan Yu
  • Publication number: 20230223080
    Abstract: A system is provided. The system includes a multiply-and-accumulate circuit and a local generator. The multiply-and-accumulate circuit is coupled to a memory array and generates a multiply-and-accumulate signal indicating a computational output of the memory array. The local generator is coupled to the memory array and generates at least one reference signal at a node in response to one of a plurality of global signals that are generated according to a number of the computational output. The local generator is further configured to generate an output signal according to the signal and a summation of the at least one reference signal at the node.
    Type: Application
    Filed: March 16, 2023
    Publication date: July 13, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Der CHIH, Meng-Fan CHANG, May-Be CHEN, Cheng-Xin XUE, Je-Syu LIU
  • Patent number: 11621040
    Abstract: A system includes a global generator and local generators. The global generator is coupled to a memory array, and is configured to generate global signals, according to a number of a computational output of the memory array. The local generators are coupled to the global generator and the memory array, and are configured to generate local signals, according to the global signals. Each one of the local generators includes a first reference circuit and a local current mirror. The first reference circuit is coupled to the global generator, and is configured to generate a first reference signal at a node, in response to a first global signal of the global signals. The local current mirror is coupled to the first reference circuit at the node, and is configured to generate the local signals, by mirroring a summation of at least one signal at the node.
    Type: Grant
    Filed: July 1, 2021
    Date of Patent: April 4, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Der Chih, Meng-Fan Chang, May-Be Chen, Cheng-Xin Xue, Je-Syu Liu
  • Publication number: 20230050978
    Abstract: A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a first transistor, a first resistive random access memory (RRAM) resistor, and a second RRAM resistor. The first resistor includes a first resistive material layer, a first electrode shared by the second resistor, and a second electrode. The second resistor includes the first electrode, a second resistive material layer, and a third electrode. The first electrode is electrically coupled to the first transistor.
    Type: Application
    Filed: August 12, 2021
    Publication date: February 16, 2023
    Inventors: YU-DER CHIH, MAY-BE CHEN, YUN-SHENG CHEN, JONATHAN TSUNG-YUNG CHANG, WEN ZHANG LIN, CHRONG JUNG LIN, YA-CHIN KING, CHIEH LEE, WANG-YI LEE
  • Publication number: 20220262432
    Abstract: A system includes a global generator and local generators. The global generator is coupled to a memory array, and is configured to generate global signals, according to a number of a computational output of the memory array. The local generators are coupled to the global generator and the memory array, and are configured to generate local signals, according to the global signals. Each one of the local generators includes a first reference circuit and a local current mirror. The first reference circuit is coupled to the global generator, and is configured to generate a first reference signal at a node, in response to a first global signal of the global signals. The local current mirror is coupled to the first reference circuit at the node, and is configured to generate the local signals, by mirroring a summation of at least one signal at the node.
    Type: Application
    Filed: July 1, 2021
    Publication date: August 18, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Der CHIH, Meng-Fan CHANG, May-Be CHEN, Cheng-Xin XUE, Je-Syu LIU
  • Publication number: 20220252989
    Abstract: A semiconductor fabrication apparatus and a method of using the same are disclosed. In one aspect, the apparatus includes a holder configured to place a substrate and a radiation source configured to provide radiation to transfer a pattern onto the substrate. The apparatus also includes a plurality of sensing devices configured to provide a reference signal based on an intensity of the radiation when the substrate is not present. The apparatus further includes a controller, operatively coupled to the plurality of sensing devices, configured to adjust the intensity of the radiation based on the reference signal.
    Type: Application
    Filed: December 22, 2021
    Publication date: August 11, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Der Chih, May-Be Chen, Ya-Chin King, Chrong Jung Lin, Burn Jeng Lin, Bo Yu Lin
  • Patent number: 10922261
    Abstract: A memory clock frequency adjusting method suitable for a computer device is provided. The computer device includes a basic input output system (BIOS) and a memory. The memory clock frequency adjusting method includes following steps. A boot process of the computer device is executed, and the memory is operated at a memory clock frequency set by the BIOS. Whether the computer device is successfully booted is determined by the BIOS to decide whether the boot process of the computer device is to be re-executed. A setting of the memory clock frequency is adjusted by the BIOS when the computer device re-executes the boot process to lower the memory clock frequency, so that the memory is operated at the lowered memory clock frequency. In addition, a mainboard and a computer operating system applying the memory clock frequency adjusting method are also provided.
    Type: Grant
    Filed: April 10, 2017
    Date of Patent: February 16, 2021
    Assignee: GIGA-BYTE TECHNOLOGY CO., LTD.
    Inventors: Cho-May Chen, Hou-Yuan Lin, Sheng-Liang Kao
  • Patent number: 10759148
    Abstract: A wood adhesive, a method for adhering wood materials using the same, and a composite wood structure using the same are disclosed. The wood adhesive comprises a first agent and a second agent, wherein the first agent comprises sodium carboxymethyl cellulose having a molecular weight from about 15,000 to about 500,000 and a degree of substitution from about 0.4 to about 2, and the second agent comprises polymeric quaternary amine.
    Type: Grant
    Filed: August 9, 2018
    Date of Patent: September 1, 2020
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Man-Lin Chen, Hsien-Kuang Lin, Sue-May Chen, Su-Huey Chen
  • Publication number: 20190392311
    Abstract: A method for quantizing an image includes estimating a probability distribution by number of pixels versus gray level intensity from an image to create a histogram of the image; calculating a cumulative distribution function (CDF) of the histogram using the probability distribution; segmenting the gray level intensity into segments based on the cumulative distribution function; and quantizing the histogram based on the segments. Herein, the segments have identical number of pixel.
    Type: Application
    Filed: June 10, 2019
    Publication date: December 26, 2019
    Inventors: Liu Liu, May-Chen Martin-Kuo
  • Publication number: 20190392312
    Abstract: A method for quantizing an image includes obtaining M batches of images; creating histograms by training based on each of the M batches of images; merging the histograms for each of the batches of images into a merged histogram; obtaining a minimum value from all minimum values of the M merged histograms and a maximum value from all maximum values of the M merged histograms; defining ranges of new bins of a new histogram according to the obtained minimum value, the obtained maximum value, and the number of the new bins; and estimating a distribution of each of the new bins by adding up frequencies falling into the ranges of the new bins to create the new histogram. The amount of the images in each of the M batches of images is N, and each of N and M is an integer and equal to or larger than two.
    Type: Application
    Filed: June 10, 2019
    Publication date: December 26, 2019
    Inventors: Liu Liu, May-Chen Martin-Kuo, Yu-Ming Wei
  • Patent number: 10351737
    Abstract: A wood adhesive is provided. The wood adhesive includes a first agent and a second agent. The first agent includes a sodium carboxymethyl cellulose and a styrene-butadiene rubber polymer. The sodium carboxymethyl cellulose has a molecular weight between 15,000 and 500,000 and a degree of substitution of from 0.4 to 2.00 of the sodium salt. The second agent includes a polymeric quaternary amine.
    Type: Grant
    Filed: August 17, 2018
    Date of Patent: July 16, 2019
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Man-Lin Chen, Hsien-Kuang Lin, Der-Jaw Chan, Sue-May Chen
  • Patent number: 10235259
    Abstract: A memory overclocking method adapted for a computer device is provided. The computer device includes a basic input output system and a memory. The memory overclocking method includes the following steps. A boot loader of the computer device is executed, and an overclocking module is executed by the basic input output system, wherein a first memory clock frequency for overclocking is preset in a serial presence detect of a memory. A second memory clock frequency by the overclocking module is generated by the overclocking module, wherein the second memory clock frequency is higher than the first memory clock frequency. Whether the second memory clock frequency meets a boot condition of the computer device is determined to decide whether to operate the memory at the second memory clock frequency. In addition, a computer device applying the memory overclocking method is also provided.
    Type: Grant
    Filed: April 7, 2017
    Date of Patent: March 19, 2019
    Assignee: GIGA-BYTE TECHNOLOGY CO., LTD.
    Inventors: Cho-May Chen, Hou-Yuan Lin, Sheng-Liang Kao
  • Patent number: 10190026
    Abstract: A wood adhesive is provided. The wood adhesive includes a first agent and a second agent. The first agent includes a sodium carboxymethyl cellulose and a styrene-butadiene rubber polymer. The sodium carboxymethyl cellulose has a molecular weight between 15,000 and 500,000 and a degree of substitution of from 0.4 to 2.00 of the sodium salt. The second agent includes a polymeric quaternary amine.
    Type: Grant
    Filed: January 29, 2016
    Date of Patent: January 29, 2019
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Man-Lin Chen, Hsien-Kuang Lin, Der-Jaw Chan, Sue-May Chen
  • Publication number: 20180355225
    Abstract: A wood adhesive is provided. The wood adhesive includes a first agent and a second agent. The first agent includes a sodium carboxymethyl cellulose and a styrene-butadiene rubber polymer. The sodium carboxymethyl cellulose has a molecular weight between 15,000 and 500,000 and a degree of substitution of from 0.4 to 2.00 of the sodium salt. The second agent includes a polymeric quaternary amine.
    Type: Application
    Filed: August 17, 2018
    Publication date: December 13, 2018
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Man-Lin CHEN, Hsien-Kuang LIN, Der-Jaw CHAN, Sue-May CHEN
  • Publication number: 20180345632
    Abstract: A wood adhesive, a method for adhering wood materials using the same, and a composite wood structure using the same are disclosed. The wood adhesive comprises a first agent and a second agent, wherein the first agent comprises sodium carboxymethyl cellulose having a molecular weight from about 15,000 to about 500,000 and a degree of substitution from about 0.4 to about 2, and the second agent comprises polymeric quaternary amine.
    Type: Application
    Filed: August 9, 2018
    Publication date: December 6, 2018
    Inventors: Man-Lin Chen, Hsien-Kuang Lin, Sue-May Chen, Su-Huey Chen
  • Publication number: 20180188770
    Abstract: A memory clock frequency adjusting method suitable for a computer device is provided. The computer device includes a basic input output system (BIOS) and a memory. The memory clock frequency adjusting method includes following steps. A boot process of the computer device is executed, and the memory is operated at a memory clock frequency set by the BIOS. Whether the computer device is successfully booted is determined by the BIOS to decide whether the boot process of the computer device is to be re-executed. A setting of the memory clock frequency is adjusted by the BIOS when the computer device re-executes the boot process to lower the memory clock frequency, so that the memory is operated at the lowered memory clock frequency. In addition, a mainboard and a computer operating system applying the memory clock frequency adjusting method are also provided.
    Type: Application
    Filed: April 10, 2017
    Publication date: July 5, 2018
    Applicant: GIGA-BYTE TECHNOLOGY CO.,LTD.
    Inventors: Cho-May Chen, Hou-Yuan Lin, Sheng-Liang Kao
  • Publication number: 20180188769
    Abstract: A memory overclocking method adapted for a computer device is provided. The computer device includes a basic input output system and a memory. The memory overclocking method includes the following steps. A boot loader of the computer device is executed, and an overclocking module is executed by the basic input output system, wherein a first memory clock frequency for overclocking is preset in a serial presence detect of a memory. A second memory clock frequency by the overclocking module is generated by the overclocking module, wherein the second memory clock frequency is higher than the first memory clock frequency. Whether the second memory clock frequency meets a boot condition of the computer device is determined to decide whether to operate the memory at the second memory clock frequency. In addition, a computer device applying the memory overclocking method is also provided.
    Type: Application
    Filed: April 7, 2017
    Publication date: July 5, 2018
    Applicant: GIGA-BYTE TECHNOLOGY CO.,LTD.
    Inventors: Cho-May Chen, Hou-Yuan Lin, Sheng-Liang Kao
  • Patent number: 9874660
    Abstract: A hardcoat composition and a polarizer and a display device applying the same are provided. The hardcoat composition includes an acrylic copolymer, a multi-functional unsaturated photomonomer or oligomer, a photoinitiator, and a thermal curing agent. The acrylic copolymer with hydroxyl group has a weight-average molecular weight equal to or larger than 15,000 and has a glass transition temperature higher than 25° C.
    Type: Grant
    Filed: September 10, 2015
    Date of Patent: January 23, 2018
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Hsien-Kuang Lin, Sue-May Chen
  • Patent number: D953276
    Type: Grant
    Filed: June 24, 2019
    Date of Patent: May 31, 2022
    Assignee: KORDZ GROUP LIMITED
    Inventor: James Tze May Chen