Abstract: A repeater system, preferably including one or more radio transceivers, such as a 5G NR transceiver configured to communicate with other elements of a 5G NR communication network such as user equipment and/or gNBs, and a signal processor. A method for repeater operation, preferably including determining synchronization information, operating in a synchronized repeater mode, and maintaining synchronization (such as by monitoring periodic signal timing and adjusting operation timing based on the monitoring), and optionally including operating in a fallback repeater mode.

Abstract: In some examples, a circuit includes a state machine. The state machine is configured to operate in a first state in which the state machine gates a pulse width modulation (PWM) signal provided for control of a power converter according to a first signal provided by a voltage control loop. The state machine is configured to operate in a second state in which the state machine gates the PWM signal according to a second signal provided by a current limit comparator. The state machine is configured to transition from the first state to the second state responsive to the second signal being asserted after the first signal is asserted in a switching cycle of the power converter. The state machine is configured to transition from the current state to the first state responsive to the first signal being asserted after the second signal in a switching cycle of the power converter.

Abstract: Systems and methods for translating natural language to SQL on a custom enterprise data warehouse powered by Generative AI. With an embodiment of the present invention, a natural language question may be converted to a meaningful and accurate database query, e.g., SQL query, relevant to tables existing in an enterprise data warehouse. An embodiment of the present invention is directed to a comprehensive approach of transforming a natural language query to a focused SQL query using domain specific data models across firmwide metadata systems and data systems. In response to a user query, an embodiment of the present invention performs metadata analysis, targeted data retrieval and then SQL generation. An embodiment of the present invention may apply data warehousing standards and guidelines followed in the enterprise and provide a plug-and-play type architecture and solution that is scalable to large warehousing and other systems.

Abstract: In an example, an apparatus includes a first decoder circuit having a first voltage identification (VID) analog input and a first digital output. The apparatus also includes a precharge circuit having a digital input and a first analog output, the digital input coupled to the first digital output. The apparatus also includes a second decoder circuit having a second VID analog input, a precharge analog input and a second digital output, the precharge analog input coupled to the first digital output. The apparatus also includes a multiplexer having a multiplexer output and first and second multiplexer inputs, the first multiplexer input coupled to the first digital output, and the second multiplexer input coupled to the second digital output.

Abstract: A system for interference cancellation, preferably including a plurality of analog taps. Each analog tap preferably includes one or more scalers and/or phase shifters, and can optionally include one or more delays. The system for interference cancellation can optionally be integrated with and/or otherwise associated with a MIMO communication system. A method for interference cancellation, preferably including: determining operation parameters and operating based on the determined parameters. The method is preferably performed using the system for interference cancellation (e.g., and/or an associated MIMO communication system), but can additionally or alternatively be performed using any other suitable system.

Abstract: Comparator circuitry for power converters. In an example, a circuit includes a comparator having a first comparator input, a second comparator input, and a comparator output, the comparator coupled to a supply terminal. The circuit further includes a first transistor coupled between a boot terminal and the first comparator input and having a control terminal coupled to a switching terminal, and a second transistor coupled between the boot terminal and the second comparator input and having a control terminal coupled to the switching terminal. Also, a third transistor is coupled between the supply terminal and the second comparator input, and a voltage reference generator is coupled to the supply terminal and to a control terminal of the third transistor.

Abstract: A system for interference mitigation includes: a transmit coupler; a receive coupler; a duplexer; and an interference cancellation module that includes a receive-band filter, a transmit-band filter, and an interference cancellation system.

Abstract: A system and method for creating accessibility of any website or application for people with sight, hearing or speech disabilities. The system and method can include receiving input of the website or the application to be accessed and an indicator as to specific disabilities a user, scoring the website or the application for its accessibility based on the specific disabilities of the user, and if the score is below a threshold, determining an alternative form for the input of the website or the application to accommodate the specific disabilities of the user.

Abstract: In one embodiment, an illustrative method herein may comprise: sending, from a server instrumentation agent configured on a transaction server, instrumented server performance data regarding the transaction server and an associated correlation token to an application programming interface (API) monitoring agent; receiving, at the server instrumentation agent, a returned acknowledgment of the instrumented server performance data regarding the transaction server and the associated correlation token from the API monitoring agent, the acknowledgement also having corresponding API monitored performance data regarding an API of the transaction server; returning, from the server instrumentation agent, a synchronization acknowledgment to the API monitoring agent in response to the returned acknowledgment to indicate complete synchronization; and correlating, by the server instrumentation agent, the instrumented server performance data regarding the transaction server and the API monitored performance data regarding t

Abstract: An optically-enhanced relay including a first transmitter that converts a first digital transmit signal to a first analog transmit signal, a first receiver that converts a first analog receive signal to a first digital receive signal, a second transmitter that converts a second digital transmit signal to a second analog transmit signal, a second receiver that converts a second analog receive signal to a second digital receive signal, and an optically-enhanced analog self-interference canceller that generates a first self-interference cancellation signal based on at least one of the first digital transmit signal and the first analog transmit signal, and combines the first self-interference cancellation signal with at least one of the first digital receive signal and the first analog receive signal.

Abstract: An example apparatus includes: a phase circuit configured to receive a pulse of a pulse width module (PWM) signal; provide, after receiving the pulse, an output voltage to a load; exhibit a fault; in response to the fault corresponding to a first category, transmit a first code voltage in a current sense (CS) signal; in response to the fault corresponding to a second category, transmit a reference voltage in the CS signal; receive, after transmission of the reference voltage, a tristate voltage in the PWM signal; and transmit, after receiving the tristate voltage, a second code voltage in the CS signal based on a type of the fault and the second category.

Abstract: One example includes a VID signal decoder circuit. The circuit includes a coarse resolution decoder that receives a VID signal. The VID signal can be encoded with a digital value of an output voltage. The coarse resolution decoder can decode the VID signal to generate a first digital signal. The circuit also includes a fine resolution decoder that receives the VID signal and to decode the VID signal to generate a second digital signal. The circuit further includes a multiplexer to provide the first digital signal as an output signal responsive to a first state of a selection signal and to provide the second digital signal as the output signal responsive to a second state of the selection signal. The first and second states of the selection signal can be based on a relative amplitude of the first and second digital signals.

Abstract: A system for enhancing isolation in coexisting time-division duplexed (TDD) transceivers includes: a blocker canceller that transforms a transmit signal of a TDD transceiver into a blocker cancellation signal configured to remove transmit-band interference in a receive signal; a first filter that filters the blocker cancellation signal; a second filter that filters the transmit signal; and a transmit-noise canceller that transforms the filtered transmit signal into a transmit noise cancellation signal configured to remove receive-band interference in the receive signal.

Abstract: An example non-transitory machine-readable storage medium includes instructions that, when executed, configure processor circuitry to at least: determine a first delay corresponding to an amount of time for a first pulse to reach first phase circuitry; determine a second delay corresponding to an amount of time for a second pulse to reach second phase circuitry; determine a third delay corresponding to an amount of time for a third pulse to reach third phase circuitry, wherein one or more of the first phase circuitry, the second phase circuitry, and the third phase circuitry are located a non-uniform distance from the processor circuitry; and transmit, based on the delays, the pulses to the respective phase circuitry such that a first time period between the first pulse and the second pulse is equal to a second time period between the second pulse and the third pulse.

Abstract: In an example, an apparatus includes a first decoder circuit having a first voltage identification (VID) analog input and a first digital output. The apparatus also includes a precharge circuit having a digital input and a first analog output, the digital input coupled to the first digital output. The apparatus also includes a second decoder circuit having a second VID analog input, a precharge analog input and a second digital output, the precharge analog input coupled to the first digital output. The apparatus also includes a multiplexer having a multiplexer output and first and second multiplexer inputs, the first multiplexer input coupled to the first digital output, and the second multiplexer input coupled to the second digital output.

Abstract: In an example, a method includes storing a pending PWM pulse for a switching voltage regulator. The method also includes determining a switching voltage regulator is operating in a current limit mode, where an inductor current is above a current limit threshold. The method includes providing a predetermined number of PWM pulses in the current limit mode. The method also includes, responsive to providing the predetermined number of PWM pulses, ceasing storage of pending PWM pulses for the switching voltage regulator.

Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for optimized graph traversal are disclosed. In one aspect, a method includes the actions of receiving a given phrase that is input through a user interface by a digital component provider. The actions further include determining an entity that is being referred to by the given phrase. The actions further include identifying properties of the entity. The actions further include selecting a subset of the properties that were identified for the entity. The actions further include identifying additional phrases. The actions further include updating the user interface to present at least some of the additional phrases with programmatic controls that assign one or more of the additional phrase as distribution criteria for digital components of the digital component provider in response to activation of the programmatic controls.

Abstract: A cross-lingual Natural Language Understanding (NLU) framework includes a cross-lingual NLU model that can be trained and tuned on a base language and one or more target languages, and subsequently be used to infer utterances in any of the supported languages. The present technique enables minimal, targeted fine-tuning of the cross-lingual NLU model in each language to be supported without negatively impacting prediction performance in other languages. Accordingly, the present technique reduces the resource costs in developing and maintaining a multi-language NLU (mNLU) framework and improves the scalability of the mNLU framework to support different languages.

Abstract: One example includes a VID signal decoder circuit. The circuit includes a coarse resolution decoder that receives a VID signal. The VID signal can be encoded with a digital value of an output voltage. The coarse resolution decoder can decode the VID signal to generate a first digital signal. The circuit also includes a fine resolution decoder that receives the VID signal and to decode the VID signal to generate a second digital signal. The circuit further includes a multiplexer to provide the first digital signal as an output signal responsive to a first state of a selection signal and to provide the second digital signal as the output signal responsive to a second state of the selection signal. The first and second states of the selection signal can be based on a relative amplitude of the first and second digital signals.

Abstract: In some examples, a circuit includes a state machine. The state machine is configured to operate in a first state in which the state machine gates a pulse width modulation (PWM) signal provided for control of a power converter according to a first signal provided by a voltage control loop. The state machine is configured to operate in a second state in which the state machine gates the PWM signal according to a second signal provided by a current limit comparator. The state machine is configured to transition from the first state to the second state responsive to the second signal being asserted after the first signal is asserted in a switching cycle of the power converter. The state machine is configured to transition from the current state to the first state responsive to the first signal being asserted after the second signal in a switching cycle of the power converter.