Abstract: A method includes a step of introducing a solution between a substrate with a membrane in which the membrane is provided so as to close an opening and a substrate provided with an independent electrode in which the independent electrode is provided, a step of pressure bonding the substrate with the membrane and the substrate with the independent electrode through a partition wall, and a step of forming a sealed liquid tank surrounded by at least the membrane and the partition wall by the pressure bonding, and arraying of a solid-state type nanopore sequencer is simply performed.

Abstract: A biological sample analysis chip including a first substrate, a membrane disposed on the first substrate, a first liquid tank which is provided with a first electrode, a plurality of second liquid tanks each of which is provided with at least one flow path and a second electrode; and a second substrate disposed below the first substrate, in which the plurality of second liquid tanks are substantially insulated from each other, the membrane disposed on the first substrate is disposed between the first liquid tank and the plurality of second liquid tanks so as to form a portion of the first liquid tank and a portion of the plurality of second liquid tanks, and the second substrate is provided with the at least one flow path and the second electrode so as to form a portion of the plurality of second liquid tanks.

Abstract: A biomolecule analysis device includes a thin film having a nanopore, a liquid tank that is disposed in contact with the thin film and contains an electrolyte solution, an electrode in contact with the liquid tank, a measurement device connected to the electrode, and a controller that controls a voltage to be applied to the electrode, in accordance with a measurement result of the measurement device. A biomolecule is introduced into the electrolyte solution. A control strand and a molecular motor are connected to a first end portion of the biomolecule, and the control strand is bound to a primer on an upstream of the control strand and has a spacer on a downstream of the control strand.

Abstract: A method includes a step of introducing a solution between a substrate with a membrane in which the membrane is provided so as to close an opening and a substrate provided with an independent electrode in which the independent electrode is provided, a step of pressure bonding the substrate with the membrane and the substrate with the independent electrode through a partition wall, and a step of forming a sealed liquid tank surrounded by at least the membrane and the partition wall by the pressure bonding, and arraying of a solid-state type nanopore sequencer is simply performed.

Abstract: A biological sample analysis chip including a first substrate, a membrane disposed on the first substrate, a first liquid tank which is provided with a first electrode, a plurality of second liquid tanks each of which is provided with at least one flow path and a second electrode; and a second substrate disposed below the first substrate, in which the plurality of second liquid tanks are substantially insulated from each other, the membrane disposed on the first substrate is disposed between the first liquid tank and the plurality of second liquid tanks so as to form a portion of the first liquid tank and a portion of the plurality of second liquid tanks, and the second substrate is provided with the at least one flow path and the second electrode so as to form a portion of the plurality of second liquid tanks.

Abstract: A piece of first connecting wiring 210 is formed of a lower layer wiring close to a semiconductor element. A piece of second connecting wiring 220 is formed of an upper layer wiring far from the semiconductor element. A first opening that passes through a silicon substrate 100 and reaches the piece of first connecting wiring 210 and a second opening that passes through the silicon substrate 100 and reaches the piece of second connecting wiring 220 are formed from a back surface of the silicon substrate 100. After that, a first through silicon via 230 and a second through silicon via 240 are formed inside the first opening and the second opening, respectively. Accordingly, the first through silicon via 230 for propagating a signal, to be coupled to the piece of first connecting wiring 210, and the second through silicon via 240 for supplying a clock and a power source, to be coupled to the piece of second connecting wiring 220, can be formed.

Abstract: A method of manufacturing a semiconductor device includes: a step of forming an inorganic insulating film and an organic insulating film on one surface of a first substrate; a step of forming an opening portion by dry-etching a laminated film of them; a step of forming a bump electrode inside the opening portion; and a step (bonding step) of bonding the one surface of the first substrate having a bump electrode formed thereon and one surface of a second substrate having a bump electrode formed thereon to each other. A surface treatment on the inorganic insulating film is performed subsequent to the step of forming the opening portion but prior to the bonding step. By performing the surface treatment on the organic insulating film, connecting property between the substrates can be improved.

Abstract: A method of manufacturing a semiconductor device includes: a step of forming an inorganic insulating film and an organic insulating film on one surface of a first substrate; a step of forming an opening portion by dry-etching a laminated film of them; a step of forming a bump electrode inside the opening portion; and a step (bonding step) of bonding the one surface of the first substrate having a bump electrode formed thereon and one surface of a second substrate having a bump electrode formed thereon to each other. A surface treatment on the inorganic insulating film is performed subsequent to the step of forming the opening portion but prior to the bonding step. By performing the surface treatment on the organic insulating film, connecting property between the substrates can be improved.

Abstract: When a silicon through electrode is to be formed from a back surface (the surface on which a semiconductor device is not formed) of a silicon substrate, a wide range of an interlayer insulating film made of a Low-k material absorbs moisture, and there is a problem that the electrical characteristics of wiring are degraded. The above-described problem can be solved by forming at least a single ring-shaped frame laid out to enclose the silicon through electrode by using metal wirings in plural layers and a connection via connecting the upper and lower metal wirings in a Low-k material layer penetrated by the silicon through electrode and by forming a moisture barrier film made up of at least a metal wiring and a connection via between the silicon through electrode and a circuit wiring formed in the vicinity of the silicon through electrode.

Abstract: A bump electrode, a dummy bump, and a heat-resistant polymer film, whose upper-surface heights are uniformed, are formed on each of a first silicon substrate and a second silicon substrate, and then, the first silicon substrate and the second silicon substrate are bonded to each other so that the bump electrodes formed on the respective substrates are electrically connected to each other. At this time, the dummy bump is arranged so as to be bonded to the heat-resistant polymer film on the silicon substrate opposed thereto, so that a semiconductor device having both of good electrical connection between the bump electrodes and bump protection performance obtained by a polymer film with high heat resistance and without voids can be achieved.

Abstract: A method of manufacturing a semiconductor device includes: a step of forming an inorganic insulating film and an organic insulating film on one surface of a first substrate; a step of forming an opening portion by dry-etching a laminated film of them; a step of forming a bump electrode inside the opening portion; and a step (bonding step) of bonding the one surface of the first substrate having a bump electrode formed thereon and one surface of a second substrate having a bump electrode formed thereon to each other. A surface treatment on the inorganic insulating film is performed subsequent to the step of forming the opening portion but prior to the bonding step. By performing the surface treatment on the organic insulating film, connecting property between the substrates can be improved.

Abstract: A semiconductor device including two silicon wafers stacked and bonded together with bumps of one wafer electrically coupled with those of the other wafer, in which generation of voids on the junction surface between the silicon wafers is suppressed. Due to a recess made in the surface of a buried conductive film, a cavity is formed in the junction surface between the silicon wafers. The ends of the cavity extend to the periphery of the junction surface between the silicon wafers. This allows the air trapped on the junction surface between the silicon wafers to get out through the cavity, thereby reducing the possibility of generation of voids on the junction surface.

Abstract: In order to provide a method for producing semiconductor devices that can use the highly productive W to W method, and achieve a high yield, a method for producing semiconductor devices comprises a step (S401) in which a reconstituted wafer is prepared by replacing defective chips with non-defective chips, a step (S403) in which the reconstituted wafer and the base wafer are connected to one another by laminating, a step (S406) in which through-electrodes are formed in the reconstituted wafer, and a step (S409) in which a separate reconstituted wafer is laminated onto and connected to the reconstituted wafer having through-electrodes.

Abstract: A bump electrode, a dummy bump, and a heat-resistant polymer film, whose upper-surface heights are uniformed, are formed on each of a first silicon substrate and a second silicon substrate, and then, the first silicon substrate and the second silicon substrate are bonded to each other so that the bump electrodes formed on the respective substrates are electrically connected to each other. At this time, the dummy bump is arranged so as to be bonded to the heat-resistant polymer film on the silicon substrate opposed thereto, so that a semiconductor device having both of good electrical connection between the bump electrodes and bump protection performance obtained by a polymer film with high heat resistance and without voids can be achieved.

Abstract: When a silicon through electrode is to be formed from a back surface (the surface on which a semiconductor device is not formed) of a silicon substrate, a wide range of an interlayer insulating film made of a Low-k material absorbs moisture, and there is a problem that the electrical characteristics of wiring are degraded. The above-described problem can be solved by forming at least a single ring-shaped frame laid out to enclose the silicon through electrode by using metal wirings in plural layers and a connection via connecting the upper and lower metal wirings in a Low-k material layer penetrated by the silicon through electrode and by forming a moisture barrier film made up of at least a metal wiring and a connection via between the silicon through electrode and a circuit wiring formed in the vicinity of the silicon through electrode.

Abstract: A semiconductor device including two silicon wafers stacked and bonded together with bumps of one wafer electrically coupled with those of the other wafer, in which generation of voids on the junction surface between the silicon wafers is suppressed. Due to a recess made in the surface of a buried conductive film, a cavity is formed in the junction surface between the silicon wafers. The ends of the cavity extend to the periphery of the junction surface between the silicon wafers. This allows the air trapped on the junction surface between the silicon wafers to get out through the cavity, thereby reducing the possibility of generation of voids on the junction surface.