Patents by Inventor Mayue Xie

Mayue Xie has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11450613
    Abstract: Apparatuses, systems and methods associated with integrated circuit packages with integrated test circuitry for testing of a channel between dies are disclosed herein. In embodiments, an integrated circuit (IC) package may include a first die, a second die, and a channel that couples the first die to the second die. The first die may include a transmitter, test circuitry coupled between the transmitter and the channel, wherein the test circuitry is to control charge and discharge of the channel, and a receiver coupled to the channel. The receiver may determine a voltage of the channel during charge and discharge of the channel, and output an indication of the voltage. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: March 23, 2018
    Date of Patent: September 20, 2022
    Assignee: Intel Corporation
    Inventors: Mayue Xie, Jong-Ru Guo, Zhiguo Qian, Zuoguo Wu
  • Patent number: 11226353
    Abstract: An electrical characterization and fault isolation probe can include a cable, a connector, and a coating over a portion of the cable. The cable can have a first conductor having a first impedance, a second conductor having a second impedance, and a dielectric surrounding the first conductor and electrically isolating the first conductor from the second conductor. The connector can physically couple to, and be in electrical communication with, the cable. The connector can include a first electrical communication pathway and a second electrical communication pathway. The first electrical communication pathway can be electrically isolated from the second electrical communication pathway. The first electrical communication pathway can be in electrical communication with the first conductor. The second electrical communication pathway can be in electrical communication with the second conductor. The connector can have a fifth impedance.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: January 18, 2022
    Assignee: Intel Corporation
    Inventors: Chengqing Hu, Mayue Xie, Simranjit S. Khalsa, Deepak Goyal
  • Publication number: 20210132113
    Abstract: An electrical characterization and fault isolation probe can include a cable, a connector, and a coating over a portion of the cable. The cable can have a first conductor having a first impedance, a second conductor having a second impedance, and a dielectric surrounding the first conductor and electrically isolating the first conductor from the second conductor. The connector can physically couple to, and be in electrical communication with, the cable. The connector can include a first electrical communication pathway and a second electrical communication pathway. The first electrical communication pathway can be electrically isolated from the second electrical communication pathway. The first electrical communication pathway can be in electrical communication with the first conductor. The second electrical communication pathway can be in electrical communication with the second conductor. The connector can have a fifth impedance.
    Type: Application
    Filed: March 31, 2017
    Publication date: May 6, 2021
    Inventors: Chengqing Hu, Mayue Xie, Simranjit S. Khalsa, Deepak Goyal
  • Patent number: 10935593
    Abstract: A method, system and computer readable medium for determination of distance to an electrical fault within a device. A signal generator excites the device with an electrical input signal. The device comprises an open circuited electrical transmission line. A frequency domain analyzer analyzes part of the signal reflected from the device for determination of the locations of resonant frequency of the signal within the device. A computer calculates the distance to the fault within the device, based on the resonant frequency. The distance to the fault is one quarter wavelength distance into the device at the resonant frequency. A frequency sweeper sweeps the frequency of the input signal and repeated calculation of the distance to the fault made at a plurality of resonant frequencies during the frequency sweep confirms the distance to the fault by convergence of the result of the repeated calculations to substantially the same location.
    Type: Grant
    Filed: December 28, 2017
    Date of Patent: March 2, 2021
    Assignee: Intel Corporation
    Inventors: Deepak Goyal, Mayue Xie, Sivaseetharaman Pandi
  • Patent number: 10908206
    Abstract: Disclosed herein are systems and methods for the characterization of transmission media, among other embodiments. For example, a system for characterizing a transmission medium may include: a waveform generator to generate an initial input waveform; waveform pre-processing circuitry to process the initial waveform to generate a processed input waveform for provision to the transmission medium, wherein the processed input waveform has a maximum amplitude greater than a maximum amplitude of the initial input waveform; and waveform output circuitry to display or store data representative of an initial output waveform, wherein the initial output waveform is output from the transmission medium as a reflection or transmission of the processed input waveform.
    Type: Grant
    Filed: May 17, 2016
    Date of Patent: February 2, 2021
    Assignee: Intel Corporation
    Inventors: Mayue Xie, Chengqing Hu, Jong-Ru Guo, Zuoguo Wu, Deepak Goyal
  • Patent number: 10746780
    Abstract: An apparatus comprises a signal generator circuit, a test probe, a signal sensor circuit, and a defect detection circuit. The signal generator circuit is configured to generate an impulse test signal having an impulse waveform and adjust a bandwidth of the impulse test signal. The test probe is electrically coupled to the signal generator circuit and configured to apply the impulse test signal to a device under test (DUT). The signal sensor circuit is configured to sense a conducted test signal produced by applying the impulse test signal to the DUT with the test probe. The defect detection circuit is configured to generate an indication of a defect in the DUT using the conducted test signal.
    Type: Grant
    Filed: November 18, 2015
    Date of Patent: August 18, 2020
    Assignee: Intel Corporation
    Inventors: Mayue Xie, Simranjit S. Khalsa, Hemachandar Tanukonda Devarajulu, Deepak Goyal, Zhiguo Qian
  • Publication number: 20190295953
    Abstract: Apparatuses, systems and methods associated with integrated circuit packages with integrated test circuitry for testing of a channel between dies are disclosed herein. In embodiments, an integrated circuit (IC) package may include a first die, a second die, and a channel that couples the first die to the second die. The first die may include a transmitter, test circuitry coupled between the transmitter and the channel, wherein the test circuitry is to control charge and discharge of the channel, and a receiver coupled to the channel. The receiver may determine a voltage of the channel during charge and discharge of the channel, and output an indication of the voltage. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: March 23, 2018
    Publication date: September 26, 2019
    Inventors: Mayue XIE, Jong-Ru GUO, Zhiguo QIAN, Zuoguo WU
  • Publication number: 20190293708
    Abstract: Disclosed herein are systems and methods for the characterization of transmission media, among other embodiments. For example, a system for characterizing a transmission medium may include: a waveform generator to generate an initial input waveform; waveform pre-processing circuitry to process the initial waveform to generate a processed input waveform for provision to the transmission medium, wherein the processed input waveform has a maximum amplitude greater than a maximum amplitude of the initial input waveform; and waveform output circuitry to display or store data representative of an initial output waveform, wherein the initial output waveform is output from the transmission medium as a reflection or transmission of the processed input waveform.
    Type: Application
    Filed: May 17, 2016
    Publication date: September 26, 2019
    Applicant: Intel Corporation
    Inventors: Mayue Xie, Chengqing Hu, Jong-Ru Guo, Zuoguo Wu, Deepak Goyal
  • Publication number: 20190204376
    Abstract: A method, system and computer readable medium for determination of distance to an electrical fault within a device. A signal generator excites the device with an electrical input signal. The device comprises an open circuited electrical transmission line. A frequency domain analyzer analyzes part of the signal reflected from the device for determination of the locations of resonant frequency of the signal within the device. A computer calculates the distance to the fault within the device, based on the resonant frequency. The distance to the fault is one quarter wavelength distance into the device at the resonant frequency. A frequency sweeper sweeps the frequency of the input signal and repeated calculation of the distance to the fault made at a plurality of resonant frequencies during the frequency sweep confirms the distance to the fault by convergence of the result of the repeated calculations to substantially the same location.
    Type: Application
    Filed: December 28, 2017
    Publication date: July 4, 2019
    Inventors: Deepak Goyal, Mayue Xie, Sivaseetharaman Pandi
  • Publication number: 20180335465
    Abstract: An apparatus comprises a signal generator circuit, a test probe, a signal sensor circuit, and a defect detection circuit. The signal generator circuit is configured to generate an impulse test signal having an impulse waveform and adjust a bandwidth of the impulse test signal. The test probe is electrically coupled to the signal generator circuit and configured to apply the impulse test signal to a device under test (DUT). The signal sensor circuit is configured to sense a conducted test signal produced by applying the impulse test signal to the DUT with the test probe. The defect detection circuit is configured to generate an indication of a defect in the DUT using the conducted test signal.
    Type: Application
    Filed: November 18, 2015
    Publication date: November 22, 2018
    Inventors: Mayue Xie, Simranjit S. Khalsa, Hemachandar Tanukonda Devarajulu, Deepak Goyal, Zhiguo Qian
  • Publication number: 20180284185
    Abstract: A die with a transmission circuit, a reception circuit, and a comparison circuit can be provided. The transmission circuit can be configured to transmit a first signal through a first channel at a first transmission rate and a first transmission amplitude. The reception circuit can be in communication with the transmission circuit through the first channel. The reception circuit can receive a second signal at a first reception rate and at a first reception amplitude. The comparison circuit can be in communication with the transmission circuit and the reception circuit. The comparison circuit can be configured to: determine a first rate error value, determine a first amplitude error value, compare the first rate error value with a rate threshold to determine a first rate error occurrence, and compare the first amplitude error value with an amplitude threshold to determine a first amplitude error occurrence.
    Type: Application
    Filed: March 30, 2017
    Publication date: October 4, 2018
    Inventors: Mayue Xie, Zhiguo Qian, Jong-Ru Guo, Zhichao Zhang, Zuoguo Wu
  • Patent number: 10088518
    Abstract: A die with a transmission circuit, a reception circuit, and a comparison circuit can be provided. The transmission circuit can be configured to transmit a first signal through a first channel at a first transmission rate and a first transmission amplitude. The reception circuit can be in communication with the transmission circuit through the first channel. The reception circuit can receive a second signal at a first reception rate and at a first reception amplitude. The comparison circuit can be in communication with the transmission circuit and the reception circuit. The comparison circuit can be configured to: determine a first rate error value, determine a first amplitude error value, compare the first rate error value with a rate threshold to determine a first rate error occurrence, and compare the first amplitude error value with an amplitude threshold to determine a first amplitude error occurrence.
    Type: Grant
    Filed: March 30, 2017
    Date of Patent: October 2, 2018
    Assignee: Intel Corporation
    Inventors: Mayue Xie, Zhiguo Qian, Jong-Ru Guo, Zhichao Zhang, Zuoguo Wu
  • Patent number: 10026664
    Abstract: Described is an apparatus comprising: an input pad; an output pad; a wire, coupled to the input pad and the output pad, the wire positioned at a periphery of a semiconductor die, the wire extending substantially along a perimeter of the semiconductor die; and one or more diodes, coupled at various sections of the wire, and positioned along the perimeter of the semiconductor die and surrounding the semiconductor die.
    Type: Grant
    Filed: January 31, 2017
    Date of Patent: July 17, 2018
    Assignee: INTEL CORPORATION
    Inventors: Mayue Xie, Zhiyong Wang, Yuan-Chuan Steven Chen
  • Patent number: 9817028
    Abstract: An apparatus comprises a contactless sense probe, an electro optic sensor module, and a test signal emitter circuit. The contactless sense probe includes a photoconductive switch and the signal bandwidth of the photoconductive switch is variable. The test signal emitter circuit configured to apply a test signal to a device under test (DUT) at a first location of the DUT, wherein the test signal includes a test signal frequency. The electro-optic sensor module is coupled to the contactless sense probe and configured to: generate an impulse signal at the contactless sense probe using an optical signal input to the first photoconductive switch; sense the test signal frequency in the impulse signal using the contactless sense probe at a second location of the DUT; and generate an indication of a defect in the DUT when the test signal frequency is undetected in the impulse signal.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: November 14, 2017
    Assignee: Intel Corporation
    Inventors: Mayue Xie, Hemachandar Tanukonda Devarajulu, Deepak Goyal
  • Publication number: 20170141006
    Abstract: Described is an apparatus comprising: an input pad; an output pad; a wire, coupled to the input pad and the output pad, the wire positioned at a periphery of a semiconductor die, the wire extending substantially along a perimeter of the semiconductor die; and one or more diodes, coupled at various sections of the wire, and positioned along the perimeter of the semiconductor die and surrounding the semiconductor die.
    Type: Application
    Filed: January 31, 2017
    Publication date: May 18, 2017
    Inventors: Mayue Xie, Zhiyong Wang, Yuan-Chuan Steven Chen
  • Publication number: 20170089951
    Abstract: An apparatus comprises a contactless sense probe, an electro optic sensor module, and a test signal emitter circuit. The contactless sense probe includes a photoconductive switch and the signal bandwidth of the photoconductive switch is variable. The test signal emitter circuit configured to apply a test signal to a device under test (DUT) at a first location of the DUT, wherein the test signal includes a test signal frequency. The electro-optic sensor module is coupled to the contactless sense probe and configured to: generate an impulse signal at the contactless sense probe using an optical signal input to the first photoconductive switch; sense the test signal frequency in the impulse signal using the contactless sense probe at a second location of the DUT; and generate an indication of a defect in the DUT when the test signal frequency is undetected in the impulse signal.
    Type: Application
    Filed: September 25, 2015
    Publication date: March 30, 2017
    Inventors: Mayue Xie, Hemachandar Tanukonda Devarajulu, Deepak Goyal
  • Patent number: 9564381
    Abstract: Described is an apparatus comprising: an input pad; an output pad; a wire, coupled to the input pad and the output pad, the wire positioned at a periphery of a semiconductor die, the wire extending substantially along a perimeter of the semiconductor die; and one or more diodes, coupled at various sections of the wire, and positioned along the perimeter of the semiconductor die and surrounding the semiconductor die.
    Type: Grant
    Filed: October 6, 2015
    Date of Patent: February 7, 2017
    Assignee: Intel Corporation
    Inventors: Mayue Xie, Zhiyong Wang, Yuan-Chuan Steven Chen
  • Publication number: 20160274044
    Abstract: Circuit device inspection system using temperature gradients. In some embodiments, a system may include an infrared camera, first and second temperature sources, controller circuitry to cause the infrared camera to capture an infrared image of a region of a circuit device and to cause the first and second temperature sources to generate first and second temperature outputs to be applied to first and second locations on the circuit device, and processing circuitry to generate temperature gradient data. The temperature gradient data may be indicative of discontinuities in traces in the circuit device.
    Type: Application
    Filed: March 20, 2015
    Publication date: September 22, 2016
    Inventors: Mayue Xie, Deepak Goyal, Thomas J. Begala
  • Publication number: 20160043011
    Abstract: Described is an apparatus comprising: an input pad; an output pad; a wire, coupled to the input pad and the output pad, the wire positioned at a periphery of a semiconductor die, the wire extending substantially along a perimeter of the semiconductor die; and one or more diodes, coupled at various sections of the wire, and positioned along the perimeter of the semiconductor die and surrounding the semiconductor die.
    Type: Application
    Filed: October 6, 2015
    Publication date: February 11, 2016
    Inventors: Mayue Xie, Zhiyong Wang, Yuan-Chuan Steven Chen
  • Patent number: 9159646
    Abstract: Described is an apparatus comprising: an input pad; an output pad; a wire, coupled to the input pad and the output pad, the wire positioned at a periphery of a semiconductor die, the wire extending substantially along a perimeter of the semiconductor die; and one or more diodes, coupled at various sections of the wire, and positioned along the perimeter of the semiconductor die and surrounding the semiconductor die.
    Type: Grant
    Filed: December 13, 2012
    Date of Patent: October 13, 2015
    Assignee: Intel Corporation
    Inventors: Mayue Xie, Zhiyong Wang, Yuan-Chuan Steven Chen