Patents by Inventor Mayumi Morizuka

Mayumi Morizuka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9865724
    Abstract: A nitride semiconductor device includes a first semiconductor layer, a second semiconductor layer, a third semiconductor layer including a nitride semiconductor provided between the first semiconductor layer and the second semiconductor layer, the third semiconductor layer being contact with the first semiconductor layer and the second semiconductor layer, and a concentration of acceptor type impurity in the third semiconductor layer is higher than that in the first semiconductor layer and the second semiconductor layer, and including a source electrode and a drain electrode, a gate electrode, a first insulating layer, and a fourth semiconductor layer and a fifth semiconductor layer, wherein the nitride semiconductor device satisfying the following formula 0<d<2[(2?Eg)/(qNa)]1/2.
    Type: Grant
    Filed: March 10, 2017
    Date of Patent: January 9, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Mayumi Morizuka
  • Patent number: 9484429
    Abstract: A semiconductor device includes a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, a first electrode, a second electrode, a control electrode, and a third electrode. The second semiconductor layer is provided on the first semiconductor layer and has a band gap narrower than that of the first semiconductor layer. The second semiconductor layer includes a first portion and a second portion which is provided together with the first portion and contains an activated acceptor. The third semiconductor layer is provided on the first portion and has a band gap wider than or equal to the band gap of the second semiconductor layer. The first and the second electrodes are provided on the third semiconductor layer. The control electrode is provided between the first electrode and the second electrode. The third electrode is provided on the second portion.
    Type: Grant
    Filed: July 7, 2015
    Date of Patent: November 1, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasuhiro Isobe, Mayumi Morizuka
  • Patent number: 9331169
    Abstract: According to an embodiment, a nitride semiconductor Schottky diode includes a first layer including a first nitride semiconductor and a second layer provided on the first layer and including a second nitride semiconductor having a wider band gap than the first nitride semiconductor. The diode also includes an ohmic electrode provided on the second layer and a Schottky electrode provided on the second layer. The second layer includes a region containing an acceptor in the vicinity of the Schottky electrode between the Schottky electrode and the ohmic electrode.
    Type: Grant
    Filed: April 9, 2015
    Date of Patent: May 3, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Mayumi Morizuka
  • Publication number: 20150325680
    Abstract: A semiconductor device includes a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, a first electrode, a second electrode, a control electrode, and a third electrode. The second semiconductor layer is provided on the first semiconductor layer and has a band gap narrower than that of the first semiconductor layer. The second semiconductor layer includes a first portion and a second portion which is provided together with the first portion and contains an activated acceptor. The third semiconductor layer is provided on the first portion and has a band gap wider than or equal to the band gap of the second semiconductor layer. The first and the second electrodes are provided on the third semiconductor layer. The control electrode is provided between the first electrode and the second electrode. The third electrode is provided on the second portion.
    Type: Application
    Filed: July 7, 2015
    Publication date: November 12, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yasuhiro ISOBE, Mayumi MORIZUKA
  • Patent number: 9136346
    Abstract: A semiconductor device that can more efficiently absorb a stored hole includes a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, a first electrode, a second electrode, a control electrode, and a third electrode. The second semiconductor layer is provided on the first semiconductor layer and has a band gap narrower than that of the first semiconductor layer. The second semiconductor layer includes a first portion and a second portion which is provided together with the first portion and contains an activated acceptor. The third semiconductor layer is provided on the first portion and has a band gap wider than or equal to the band gap of the second semiconductor layer. The first and the second electrodes are provided on the third semiconductor layer. The control electrode is provided between the first electrode and the second electrode. The third electrode is provided on the second portion.
    Type: Grant
    Filed: September 13, 2013
    Date of Patent: September 15, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasuhiro Isobe, Mayumi Morizuka
  • Publication number: 20150214326
    Abstract: According to an embodiment, a nitride semiconductor Schottky diode includes a first layer including a first nitride semiconductor and a second layer provided on the first layer and including a second nitride semiconductor having a wider band gap than the first nitride semiconductor. The diode also includes an ohmic electrode provided on the second layer and a Schottky electrode provided on the second layer. The second layer includes a region containing an acceptor in the vicinity of the Schottky electrode between the Schottky electrode and the ohmic electrode.
    Type: Application
    Filed: April 9, 2015
    Publication date: July 30, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Mayumi MORIZUKA
  • Patent number: 9059327
    Abstract: According to an embodiment, a nitride semiconductor Schottky diode includes a first layer including a first nitride semiconductor and a second layer provided on the first layer and including a second nitride semiconductor having a wider band gap than the first nitride semiconductor. The diode also includes an ohmic electrode provided on the second layer and a Schottky electrode provided on the second layer. The second layer includes a region containing an acceptor in the vicinity of the Schottky electrode between the Schottky electrode and the ohmic electrode.
    Type: Grant
    Filed: March 7, 2013
    Date of Patent: June 16, 2015
    Assignee: Kabushika Kaisha Toshiba
    Inventor: Mayumi Morizuka
  • Patent number: 8969917
    Abstract: According to an embodiment, a semiconductor device includes a first layer including a first nitride semiconductor, a second layer provided on the first layer and including a second nitride semiconductor having a wider bandgap than the first nitride semiconductor. The device also includes a source electrode and a drain electrode provided on the second layer; and a gate electrode provided on the second layer and located between the source electrode and the drain electrode. The second layer includes a first region between the gate electrode and the drain electrode, the first region being selectively provided in a surface of the second layer and contains fluorine. A concentration of fluorine in the first region is higher than a concentration of fluorine in a portion underneath the gate electrode in the second layer.
    Type: Grant
    Filed: March 7, 2013
    Date of Patent: March 3, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mayumi Morizuka, Yoshiharu Takada
  • Patent number: 8754420
    Abstract: A semiconductor device of an embodiment includes: a first semiconductor layer made of AlXGa1-XN (0<x<1) or InyAl1-yN (0?y?1); a first semiconductor region, an insulating film, and an anode electrode that are formed on the same plane of the first semiconductor layer, and are made of undoped, n-type, or p-type GaN; and a cathode electrode formed on the first semiconductor region. In this semiconductor device, the first semiconductor region, the insulating film, and the anode electrode are joined to the first semiconductor layer. The insulating film is joined to the first semiconductor layer between the first semiconductor region and the anode electrode. The junction between the anode electrode and the first semiconductor layer is an ohmic junction. The junction between the cathode electrode and the first semiconductor region is an ohmic junction.
    Type: Grant
    Filed: February 16, 2012
    Date of Patent: June 17, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kentaro Ikeda, Mayumi Morizuka
  • Publication number: 20140117375
    Abstract: A semiconductor device includes a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, a first electrode, a second electrode, a control electrode, and a third electrode. The second semiconductor layer is provided on the first semiconductor layer and has a band gap narrower than that of the first semiconductor layer. The second semiconductor layer includes a first portion and a second portion which is provided together with the first portion and contains an activated acceptor. The third semiconductor layer is provided on the first portion and has a band gap wider than or equal to the band gap of the second semiconductor layer. The first and the second electrodes are provided on the third semiconductor layer. The control electrode is provided between the first electrode and the second electrode. The third electrode is provided on the second portion.
    Type: Application
    Filed: September 13, 2013
    Publication date: May 1, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yasuhiro ISOBE, Mayumi MORIZUKA
  • Publication number: 20130256753
    Abstract: According to an embodiment, a semiconductor device includes a first layer including a first nitride semiconductor, a second layer provided on the first layer and including a second nitride semiconductor having a wider bandgap than the first nitride semiconductor. The device also includes a source electrode and a drain electrode provided on the second layer; and a gate electrode provided on the second layer and located between the source electrode and the drain electrode. The second layer includes a first region between the gate electrode and the drain electrode, the first region being selectively provided in a surface of the second layer and contains fluorine. A concentration of fluorine in the first region is higher than a concentration of fluorine in a portion underneath the gate electrode in the second layer.
    Type: Application
    Filed: March 7, 2013
    Publication date: October 3, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Mayumi MORIZUKA, Yoshiharu Takada
  • Publication number: 20130256688
    Abstract: According to an embodiment, a nitride semiconductor Schottky diode includes a first layer including a first nitride semiconductor and a second layer provided on the first layer and including a second nitride semiconductor having a wider band gap than the first nitride semiconductor. The diode also includes an ohmic electrode provided on the second layer and a Schottky electrode provided on the second layer. The second layer includes a region containing an acceptor in the vicinity of the Schottky electrode between the Schottky electrode and the ohmic electrode.
    Type: Application
    Filed: March 7, 2013
    Publication date: October 3, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Mayumi MORIZUKA
  • Publication number: 20130062611
    Abstract: A semiconductor device of an embodiment includes: a first semiconductor layer made of AlXGa1-XN (0<x<1) or InyAl1-yN (0?y?1); a first semiconductor region, an insulating film, and an anode electrode that are formed on the same plane of the first semiconductor layer, and are made of undoped, n-type, or p-type GaN; and a cathode electrode formed on the first semiconductor region. In this semiconductor device, the first semiconductor region, the insulating film, and the anode electrode are joined to the first semiconductor layer. The insulating film is joined to the first semiconductor layer between the first semiconductor region and the anode electrode. The junction between the anode electrode and the first semiconductor layer is an ohmic junction. The junction between the cathode electrode and the first semiconductor region is an ohmic junction.
    Type: Application
    Filed: February 16, 2012
    Publication date: March 14, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kentaro IKEDA, Mayumi Morizuka
  • Patent number: 7490390
    Abstract: A manufacturing method is provided for a voltage controlled oscillator comprising an thin film BAW resonator and a variable capacitor element. The thin film BAW resonator includes an anchor section formed on a Si substrate, a lower electrode supported on the anchor section and positioned to face the Si substrate, a first piezoelectric film formed on the lower electrode, and an upper electrode formed on the first piezoelectric film. The variable capacitor element includes a stationary electrode formed on a Si substrate, an anchor section formed on the Si substrate, a first electrode supported on the anchor section and positioned to face the Si substrate, a second piezoelectric film formed on the first electrode, and a second electrode formed on the second piezoelectric film.
    Type: Grant
    Filed: April 27, 2007
    Date of Patent: February 17, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takashi Kawakubo, Kazuhide Abe, Mayumi Morizuka
  • Publication number: 20070209176
    Abstract: The present invention provides a voltage controlled oscillator comprising an thin film BAW resonator and a variable capacitor element. The thin film BAW resonator includes an anchor section formed on a Si substrate, a lower electrode supported on the anchor section and positioned to face the Si substrate, a first piezoelectric film formed on the lower electrode, and an upper electrode formed on the first piezoelectric film. On the other hand, the variable capacitor element includes a stationary electrode formed on a Si substrate, an anchor section formed on the Si substrate, a first electrode supported on the anchor section and positioned to face the Si substrate, a second piezoelectric film formed on the first electrode, and a second electrode formed on the second piezoelectric film.
    Type: Application
    Filed: April 27, 2007
    Publication date: September 13, 2007
    Inventors: Takashi KAWAKUBO, Kazuhide Abe, Mayumi Morizuka
  • Patent number: 7221920
    Abstract: A voltage controlled oscillator includes a resonator configured to resonate with an initial oscillation frequency during starting period of oscillation and a steady oscillation frequency during a steady state oscillation. The resonator includes a film bulk acoustic resonator having a series resonance frequency higher than the steady oscillation frequency. A negative resistance circuit configured to drive the resonator, has a positive increment for reactance in the steady state oscillation compared with reactance in the starting period.
    Type: Grant
    Filed: July 15, 2004
    Date of Patent: May 22, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuhide Abe, Mayumi Morizuka, Ryoichi Ohara, Kenya Sano, Naoko Yanase, Takaaki Yasumoto, Tadahiro Sasaki, Kazuhiko Itaya, Takashi Kawakubo, Hiroshi Yoshida, Ryuichi Fujimoto, Keiichi Yamaguchi, Nobuyuki Itoh, Tooru Kozu, Takeshi Ookubo
  • Patent number: 7211933
    Abstract: The present invention provides a voltage controlled oscillator comprising an thin film BAW resonator and a variable capacitor element. The thin film BAW resonator includes an anchor section formed on a Si substrate, a lower electrode supported on the anchor section and positioned to face the Si substrate, a first piezoelectric film formed on the lower electrode, and an upper electrode formed on the first piezoelectric film. On the other hand, the variable capacitor element includes a stationary electrode formed on a Si substrate, an anchor section formed on the Si substrate, a first electrode supported on the anchor section and positioned to face the Si substrate, a second piezoelectric film formed on the first electrode, and a second electrode formed on the second piezoelectric film.
    Type: Grant
    Filed: September 8, 2004
    Date of Patent: May 1, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takashi Kawakubo, Kazuhide Abe, Mayumi Morizuka
  • Patent number: 6908799
    Abstract: A high electron mobility transistor comprises a GaN-based electron accumulation layer formed on a substrate, an electron supply layer formed on the electron accumulation layer, a source electrode and a drain electrode formed on the electron supply layer and spaced from each other, a gate electrode formed on the electron supply layer between the source and drain electrodes, and a hole absorption electrode formed on the electron accumulation layer so as to be substantially spaced from the electron supply layer. Since the hole absorption electrode is formed on the electron absorption layer in order to prevent holes generated by impact ionization from being accumulated on the electron accumulation layer, a kink phenomenon is prevented. Good drain-current/voltage characteristics are therefore obtained. A high power/high electron mobility transistor is provided with a high power-added efficiency and good linearity.
    Type: Grant
    Filed: September 30, 2003
    Date of Patent: June 21, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Mayumi Morizuka
  • Publication number: 20050099236
    Abstract: The present invention provides a voltage controlled oscillator comprising an thin film BAW resonator and a variable capacitor element. The thin film BAW resonator includes an anchor section formed on a Si substrate, a lower electrode supported on the anchor section and positioned to face the Si substrate, a first piezoelectric film formed on the lower electrode, and an upper electrode formed on the first piezoelectric film. On the other hand, the variable capacitor element includes a stationary electrode formed on a Si substrate, an anchor section formed on the Si substrate, a first electrode supported on the anchor section and positioned to face the Si substrate, a second piezoelectric film formed on the first electrode, and a second electrode formed on the second piezoelectric film.
    Type: Application
    Filed: September 8, 2004
    Publication date: May 12, 2005
    Inventors: Takashi Kawakubo, Kazuhide Abe, Mayumi Morizuka
  • Publication number: 20050059375
    Abstract: A voltage controlled oscillator includes a resonator configured to resonate with an initial oscillation frequency during starting period of oscillation and a steady oscillation frequency during a steady state oscillation. The resonator includes a film bulk acoustic resonator having a series resonance frequency higher than the steady oscillation frequency. A negative resistance circuit configured to drive the resonator, has a positive increment for reactance in the steady state oscillation compared with reactance in the starting period.
    Type: Application
    Filed: July 15, 2004
    Publication date: March 17, 2005
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kazuhide Abe, Mayumi Morizuka, Ryoichi Ohara, Kenya Sano, Naoko Yanase, Takaaki Yasumoto, Tadahiro Sasaki, Kazuhiko Itaya, Takashi Kawakubo, Hiroshi Yoshida, Ryuichi Fujimoto, Keiichi Yamaguchi, Nobuyuki Itoh, Tooru Kozu, Takeshi Ookubo