Patents by Inventor Mayumi Nakasato
Mayumi Nakasato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10186738Abstract: A cell module comprises: a cell stack comprising multiple cells which are electrically connected to each other; a plate-shaped heat dissipating member arranged such that it extends along a direction in which the multiple cells are arranged, and such that it is thermally connected to the multiple cells; and an intervening layer arranged between the cell stack and the heat dissipating member, and configured to allow heat to propagate from the cell stack to the heat dissipating member, and to suppress a relative displacement between the cell stack and the heat dissipating member.Type: GrantFiled: July 21, 2016Date of Patent: January 22, 2019Assignee: Sanyo Electric Co., Ltd.Inventors: Tetsuji Omura, Mayumi Nakasato, Fusanori Watanabe
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Publication number: 20160329617Abstract: A cell module comprises: a cell stack comprising multiple cells which are electrically connected to each other; a plate-shaped heat dissipating member arranged such that it extends along a direction in which the multiple cells are arranged, and such that it is thermally connected to the multiple cells; and an intervening layer arranged between the cell stack and the heat dissipating member, and configured to allow heat to propagate from the cell stack to the heat dissipating member, and to suppress a relative displacement between the cell stack and the heat dissipating member.Type: ApplicationFiled: July 21, 2016Publication date: November 10, 2016Inventors: Tetsuji OMURA, Mayumi NAKASATO, Fusanori WATANABE
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Patent number: 9431686Abstract: A cell module comprises: a cell stack comprising multiple cells which are electrically connected to each other; a plate-shaped heat dissipating member arranged such that it extends along a direction in which the multiple cells are arranged, and such that it is thermally connected to the multiple cells ; and an intervening layer arranged between the cell stack and the heat dissipating member, and configured to allow heat to propagate from the cell stack to the heat dissipating member, and to suppress a relative displacement between the cell stack and the heat dissipating member.Type: GrantFiled: February 16, 2012Date of Patent: August 30, 2016Assignee: SANYO ELECTRIC CO., LTD.Inventors: Tetsuji Omura, Mayumi Nakasato, Fusanori Watanabe
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Patent number: 9307630Abstract: A device mounting board comprises: a heat dissipating substrate formed of a material containing at least one metal material selected from a group including Al, Mg, and Ti; an insulting resin layer laminated on the heat dissipating substrate; and a wiring layer laminated on the insulating resin layer, and on which a power module is to be mounted. The heat dissipating substrate comprises a random porous layer arranged such that it faces the insulating resin layer, and having cavities elongated in respective random directions.Type: GrantFiled: February 15, 2013Date of Patent: April 5, 2016Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Masayuki Nagamatsu, Mayumi Nakasato, Yasuyuki Yanase
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Patent number: 9035454Abstract: Prepared in advance is a substrate formed of metallic material where slits are formed between mounting regions. Oxide films are generated all over the substrate including end faces of the substrate. Exposed are only lateral faces corresponding to the cross sections cut when tie bars are cut. This structure and the fabrication method minimize the area of cutting faces in the metallic material.Type: GrantFiled: November 27, 2013Date of Patent: May 19, 2015Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Masayuki Nagamatsu, Mayumi Nakasato, Masurao Yoshii, Yasuhiro Kohara, Kotaro Deguchi
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Patent number: 9024446Abstract: Conventional printed circuit boards had a problem of being inferior in heat-radiation characteristic, and metal-core printed circuit boards adopted to improve the heat-radiation characteristic had problems in having low rigidity and a tendency to bend. The ductility of the metal can be obstructed, and the metal protected; by covering substantially the whole area of the front and back sides of the metal core, consisting of metal as the main material, with a first ceramic film and a second ceramic film that obstruct the ductility of the aforementioned metal-core; and covering each of the ceramic films with insulated resin films, to cover the fragility of these ceramics.Type: GrantFiled: June 30, 2010Date of Patent: May 5, 2015Assignee: Panasonic Intellectual Property Management Co., Ltd.Inventors: Ryosuke Usui, Yusuke Igarashi, Yasunori Inoue, Mayumi Nakasato, Masayuki Nagamatsu, Yasuhiro Kohara
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Publication number: 20140084452Abstract: Prepared in advance is a substrate formed of metallic material where slits are formed between mounting regions. Oxide films are generated all over the substrate including end faces of the substrate. Exposed are only lateral faces corresponding to the cross sections cut when tie bars are cut. This structure and the fabrication method minimize the area of cutting faces in the metallic material.Type: ApplicationFiled: November 27, 2013Publication date: March 27, 2014Applicant: SANYO ELECTRIC CO., LTD.Inventors: Masayuki NAGAMATSU, Mayumi NAKASATO, Masurao YOSHII, Yasuhiro KOHARA, Kotaro DEGUCHI
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Publication number: 20140063767Abstract: A circuit device according to one exemplary embodiment includes a ceramic substrate, a first conductive pattern provided on one face of the ceramic substrate, a second conductive pattern, formed mainly of Cu, which is provided on the other face of the ceramic substrate, and a semiconductor element provided on an island that constitutes the second conductive pattern. An electrode, whose outermost surface is formed mainly of Cu, is provided in the semiconductor element, and the interface between the island and the electrode is directly fixed by solid-phase bonding.Type: ApplicationFiled: November 8, 2013Publication date: March 6, 2014Applicant: SANYO ELECTRIC CO., LTD.Inventors: Kouichi SAITOU, Yoshio OKAYAMA, Mayumi NAKASATO
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Publication number: 20130344378Abstract: An assembled battery comprises: multiple cells 30 each having external terminals including a negative electrode terminal 50 and a positive electrode terminal 60; a bus bar 40 configured to connect the external terminal of one of two adjacent cells 30 to the external terminal of the other of these two adjacent cells 30; a connecting member 70 welded to the external terminal and the bus bar 40 so as to electrically connect the external terminal and the bus bar 40; a welding portion 80 at which the external terminal and the connecting member 70 are welded; and a welding portion 82 at which the bus bar 40 and the connecting member 70 are welded. The external terminal has a region that is at a distance from an outer package as compared with a portion of the connecting member 70 that is adjacent to the welding portion 80.Type: ApplicationFiled: February 3, 2012Publication date: December 26, 2013Applicant: SANYO ELECTRIC CO., LTD.Inventors: Yasuhiro Kohara, Mayumi Nakasato, Fusanori Watanabe, Yasuhiro Asai, Takashi Seto, Daiki Uchiyama
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Publication number: 20130337310Abstract: A cell module 10 comprises: a cell stack 20 comprising multiple cells 30 which are electrically connected to each other; a plate-shaped heat dissipating member 70 arranged such that it extends along a direction in which the multiple cells 30 are arranged, and such that it is thermally connected to the multiple cells 30; and an intervening layer 80 arranged between the cell stack 20 and the heat dissipating member 70, and configured to allow heat to propagate from the cell stack 20 to the heat dissipating member 70, and to suppress a relative displacement between the cell stack 20 and the heat dissipating member 70.Type: ApplicationFiled: February 16, 2012Publication date: December 19, 2013Applicant: SANYO ELECTRIC CO., LTD.Inventors: Tetsuji Omura, Mayumi Nakasato, Fusanori Watanabe
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Patent number: 8592257Abstract: A method for fabricating a semiconductor module includes: bonding a semiconductor substrate onto a first insulating resin layer; dicing the semiconductor substrate into a plurality of individual semiconductor devices; widening the spacings between the adjacent semiconductor devices by expanding the first insulating resin layer in a biaxially stretched manner; fixing the plurality of semiconductor devices to a flat sheet, with a second insulating resin layer held between the plurality of semiconductor devices and the flat sheet, and removing the first insulating resin layer; stacking the plurality of semiconductor devices, a third insulating resin layer, and a metallic plate, in this order, so as to form a laminated body having electrodes by which to electrically connect the device electrodes to the metallic plate; forming a wiring layer by selectively removing the metallic plate and forming a plurality of semiconductor modules; and separating the semiconductor modules into individual units.Type: GrantFiled: July 20, 2012Date of Patent: November 26, 2013Assignee: Sanyo Electric Co., Ltd.Inventors: Mayumi Nakasato, Kouichi Saitou
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Patent number: 8476776Abstract: A semiconductor module manufacturing method includes a step of bonding a semiconductor wafer, which has a plurality of semiconductor elements each of which has an element electrode formed thereon, on an expansible first insulating resin layer; a step of dicing the semiconductor wafer; a step of expanding the first insulating resin layer to widen a gap between semiconductor elements; a pressure-bonding step of pressure-bonding a metal plate whereupon an electrode is arranged and the semiconductor elements with the widened gaps in between, by having a second insulating resin layer in between, and electrically connecting the electrode and the element electrodes; a step of forming a wiring layer which corresponds to each semiconductor element by selectively removing the metal plate and forming a plurality of semiconductor modules connected by the first insulating resin layer and the second insulating resin layer; and a step of separating the semiconductor modules by cutting the first insulating resin layer and thType: GrantFiled: March 18, 2009Date of Patent: July 2, 2013Assignee: Sanyo Electric Co., Ltd.Inventors: Ryosuke Usui, Yasunori Inoue, Mayumi Nakasato, Katsumi Ito
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Patent number: 8438724Abstract: Methods for producing a substrate for mounting a device and for producing a semiconductor module are provided. The methods comprise preparing a metal plate on one major surface of which a plurality of projected electrodes are provided. An insulating resin layer is formed on the major surface so as to cover the top surface of the projected electrodes. The top surface of at least one of the plurality of projected electrodes is exposed by removing the insulating resin layer so that a major surface of the insulating resin layer opposite to the metal plate is level. A plurality of counter electrodes is arranged having a counterface to face the top face of the plurality of projected electrodes or a semiconductor device having a plurality of device electrodes is arranged to face the top face of the plurality of projected electrodes.Type: GrantFiled: October 7, 2010Date of Patent: May 14, 2013Assignee: Sanyo Electric Co., Ltd.Inventors: Kouichi Saitou, Yoshio Okayama, Yoh Takano, Mayumi Nakasato
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Patent number: 8378229Abstract: A circuit board includes a substrate made principally of metal. An opening is provided on the substrate. A first wiring layer is provided on one surface of the substrate via a first insulating layer, and a second wiring layer is provided on the other surface of the substrate via a second insulating layer. A conductor penetrates the substrate via the opening and connects the first wiring layer with the second wiring layer. An end of the opening at one surface side of the substrate has a tapering form on a surface layer thereof, and the first insulating layer has a recess on an upper surface thereof in an upper region of the opening.Type: GrantFiled: June 11, 2010Date of Patent: February 19, 2013Assignee: Sanyo Electric Co., Ltd.Inventors: Mayumi Nakasato, Hideki Mizuhara
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Patent number: 8373281Abstract: A semiconductor element mounted on an insulating resin layer formed on a wiring layer is sealed by a sealing resin. On the wiring layer, a protruding electrode protruding to the side of the semiconductor element and a protruding section are integrally formed with the wiring layer, respectively. The protruding electrode is electrically connected to an element electrode of the semiconductor element by penetrating the insulating resin layer. The protruding section is arranged to surround the semiconductor element along the four sides of the semiconductor element, and is embedded in the sealing resin up to a position above a section where the protruding electrode and the element electrode are bonded.Type: GrantFiled: July 29, 2009Date of Patent: February 12, 2013Inventors: Hajime Kobayashi, Mayumi Nakasato, Ryosuke Usui, Yasuyuki Yanase, Koichi Saito
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Publication number: 20120288999Abstract: A method for fabricating a semiconductor module includes: bonding a semiconductor substrate onto a first insulating resin layer; dicing the semiconductor substrate into a plurality of individual semiconductor devices; widening the spacings between the adjacent semiconductor devices by expanding the first insulating resin layer in a biaxially stretched manner; fixing the plurality of semiconductor devices to a flat sheet, with a second insulating resin layer held between the plurality of semiconductor devices and the flat sheet, and removing the first insulating resin layer; stacking the plurality of semiconductor devices, a third insulating resin layer, and a metallic plate, in this order, so as to form a laminated body having electrodes by which to electrically connect the device electrodes to the metallic plate; forming a wiring layer by selectively removing the metallic plate and forming a plurality of semiconductor modules; and separating the semiconductor modules into individual units.Type: ApplicationFiled: July 20, 2012Publication date: November 15, 2012Applicant: SANYO ELECTRIC CO., LTD.Inventors: Mayumi NAKASATO, Kouichi Saitou
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Patent number: 8283568Abstract: A device mounting board includes: an insulating resin layer; a wiring layer provided on one main surface of the insulating resin layer; and a bump electrode, electrically connected to the wiring layer, which is protruded from the wiring layer toward the insulating resin layer. Asperities are formed on the side surface of the bump electrode and the surface roughness of the side surface of the bump electrode is greater than that of the top surface of the bump electrode.Type: GrantFiled: February 2, 2009Date of Patent: October 9, 2012Assignee: Sanyo Electric Co., Ltd.Inventors: Mayumi Nakasato, Katsumi Ito
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Patent number: 8258620Abstract: A circuit device includes an insulating base provided with a resin layer mixed with a fibrous filler, bumps provided in the insulating base and functioning as electrodes for connection, a semiconductor device that is flip-chip mounted, and an underfill filling a gap between the semiconductor device and the insulating base. By allowing the fibrous filler projecting through the top surface of the resin layer to be in contact with the underfill, strength of adhesion between the underfill and the insulating base is improved.Type: GrantFiled: August 8, 2008Date of Patent: September 4, 2012Assignee: Sanyo Electric Co., Ltd.Inventors: Mayumi Nakasato, Ryosuke Usui, Kiyoshi Shibata
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Patent number: 8183090Abstract: To reduce connection defects between a circuit substrate provided on a core substrate and a circuit to be mounted thereon, thereby improving reliability as a multilayered device mounting substrate. The device mounting substrate includes: a first circuit substrate composed of a substrate, an insulating layer formed on this substrate, and a first conductive layer (including conductive parts) formed on this insulating layer; and a second circuit substrate mounted on the first circuit substrate, being composed of a base, a second conductive layer (including conductive parts) formed on the bottom of the base, and a third conductive layer (including conductive parts) formed on the top of the base. Here, the first and second circuit substrates are bonded by pressure so that the first and second conductive parts are laminated and embedded together into the insulating layer.Type: GrantFiled: August 13, 2010Date of Patent: May 22, 2012Assignee: Sanyo Electric Co., Ltd.Inventors: Mayumi Nakasato, Hideki Mizuhara, Takaya Kusabe, Sadamichi Takakusaki
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Publication number: 20120098137Abstract: Conventional printed circuit boards had a problem of being inferior in heat-radiation characteristic, and metal-core printed circuit boards adopted to improve the heat-radiation characteristic had problems in having low rigidity and a tendency to bend. The ductility of the metal can be obstructed, and the metal protected; by covering substantially the whole area of the front and back sides of the metal core, consisting of metal as the main material, with a first ceramic film and a second ceramic film that obstruct the ductility of the aforementioned metal-core; and covering each of the ceramic films with insulated resin films, to cover the fragility of these ceramics.Type: ApplicationFiled: June 30, 2010Publication date: April 26, 2012Inventors: Ryosuke Usui, Yusuke Igarashi, Yasunori Inoue, Mayumi Nakasato, Masayuki Nagamatsu, Yasuhiro Kohara