Abstract: Semiconductor components and systems having substrate contacting surfaces with a reduced hardness are provided. Systems and components include a ceramic, metallic, or non-metallic component for contacting a substrate. Systems and components include a layer of coating material on at least a portion of a substrate contacting surface of the component. Systems and components include where the component for contacting a substrate includes a component Vickers hardness value, and the layer of coating material exhibits a coating layer Vickers hardness value. Systems and components include where the coating layer Vickers hardness value is greater than or about 10% less than the component Vickers hardness value.

Abstract: A sensor can be configured to measure wafer bowing characteristics associated with a bow of a wafer after a first fabrication process is performed on the wafer in a first processing chamber and before a second fabrication process is performed on the wafer in a second processing chamber. A transfer chamber, including the sensor, can be coupled to a first process chamber and a second process chamber. The wafer bowing characteristics can be used by a controller to determine recipe parameters. The recipe parameters can be used by the controller to control environmental conditions in the transfer chamber and/or processing chamber and cause the processing chamber to perform its associated fabrication process using the recipe parameters.

Abstract: Gas distribution assemblies, processing chambers, and methods for processing substrates are provided. A substrate processing chamber includes a chamber body having a first end and a second end, a lid coupled to the first end of the chamber body, an isolator disposed on an upper surface of the lid, a faceplate disposed on an upper surface of the isolator, a substrate support disposed on a shaft extending through the second end of the chamber body, a pumping ring positioned within the chamber body, and an exhaust outlet in fluid communication with a system foreline and the plurality of apertures. The processing chamber defines a processing region between the substrate support and the faceplate. The pumping ring includes a flange extending in a plane generally parallel with a top surface of the substrate support that defines a plurality of apertures.

Abstract: Exemplary semiconductor processing chambers may include a chamber body. The chambers may include a substrate support within the chamber body. The substrate support may define a substrate support surface. The chambers may include a faceplate supported atop the chamber body. The substrate support and a bottom surface of the faceplate may at least partially define a processing region. The bottom surface of the faceplate may define an annular protrusion that is directly above at least a portion of a radially outer 10% of the substrate support surface and an annular groove that is positioned radially outward of the annular protrusion. At least a portion of the annular groove may extend radially outward beyond the substrate support surface. The faceplate may define apertures through the faceplate. A first subset of the apertures may extend through the annular protrusion and a second subset of the apertures may extend through the annular groove.

Abstract: Exemplary methods of semiconductor processing may include delivering a deposition precursor into a processing region of a semiconductor processing chamber. The methods may include depositing a layer of material on a substrate housed in the processing region of the semiconductor processing chamber. The processing region may be maintained at a first pressure during the deposition. The methods may include extending a baffle within the processing region. The baffle may modify a flow path within the processing region. The methods may include forming a plasma of a treatment or etch precursor within the processing region of the semiconductor processing chamber. The processing region may be maintained at a second pressure during the forming. The methods may include treating the layer of material deposited on the substrate with plasma effluents of the treatment precursor. The processes may be cycled any number of times.

Abstract: A substrate support assembly includes a shaft with a platen extending perpendicularly from the shaft at an upper end of the shaft. The shaft includes an electric line and a plurality of coolant conduits. A cooling plate including a coolant channel fluidically coupled to the coolant conduits is mounted to the platen, and extends beyond an outer rim of the platen. A puck assembly including a heater is mounted to the cooling plate. A simultaneous operation of the heater and a flow of coolant through the coolant channel regulates a temperature gradient across the puck assembly during a substrate processing operation.

Abstract: Exemplary semiconductor processing systems include a processing chamber, a power supply, and a chuck disposed at least partially within the processing chamber. The chuck includes a chuck body defining a vacuum port. The chuck also includes first and second coplanar electrodes embedded in the chuck body and connected to the power supply. In some examples, coplanar electrodes include concentric electrodes defining a concentric gap in between. Exemplary semiconductor processing methods may include activating the power supply for the electrostatic chuck to secure a semiconductor substrate on the body of the chuck and/or activating the vacuum port defined by the body of the electrostatic chuck. Some processing can be carried out at increased pressure, while other processing can be carried out at reduced pressure with increased chucking voltage.

Abstract: Exemplary substrate processing systems may include a lid plate. The systems may include a plurality of processing regions. The systems may include at least one splitter. Each splitter may include a top surface and side surfaces. Each splitter may define an inlet and a plurality of outlets. Each inlet and outlet may extend through a side surface. Each splitter may define an inlet lumen that extends from the fluid inlet to a hub. Each splitter may define a plurality of outlet lumens that each extend from the hub to one of the outlets. Each of the outlet lumens may have a same length. The systems may include a plurality of output manifolds. Each of the output manifolds may be coupled with a respective processing region. The systems may include a plurality of valves. At least one valve may be coupled between each outlet and an output manifold.

Abstract: Exemplary semiconductor processing chambers may include a gasbox. The chambers may include a substrate support. The chambers may include a blocker plate positioned between the gasbox and the substrate support. The blocker plate may define a plurality of apertures through the plate. The chambers may include a faceplate positioned between the blocker plate and the substrate support. The faceplate may be characterized by a first surface facing the blocker plate and a second surface opposite the first surface. The faceplate may be characterized by a central axis. The faceplate may define a plurality of apertures through the faceplate distributed in a number of rings. Each ring of apertures may include a scaled increase in aperture number from a ring radially inward. A radially outermost ring of apertures may be characterized by a number of apertures reduced from the scaled increase in aperture number.

Abstract: Semiconductor fabrication component preparation methods are described. In embodiments, the methods include forming a first layer on a surface of the semiconductor fabrication component. The first layer is characterized by a porosity of greater than or about 0.01 vol. %. The methods further include depositing a second layer on the first layer, where the second layer is characterized by a porosity of less than or about 20 vol. %. Treated semiconductor fabrication components are also described. In embodiments, the treated components include a first layer formed in the surface of the semiconductor fabrication component, where the first layer is characterized by a porosity of greater than or about 0.01 vol. %., and a second layer positioned on the first layer, where the second layer is characterized by a porosity of less than or about 20 vol. %.

Abstract: Exemplary substrate support assemblies may include an electrostatic chuck body that defines a substrate support surface. The substrate support surface may define a plurality of protrusions that extend upward from the substrate support surface. A density of the plurality of protrusions within an outer region of the substrate support surface may be greater than in an inner region of the substrate support surface. The substrate support assemblies may include a support stem coupled with the electrostatic chuck body. The substrate support assemblies may include an electrode embedded within the electrostatic chuck body.

Abstract: Exemplary substrate support assemblies may include a chuck body defining a substrate support surface. The substrate support surface may define a plurality of protrusions that extend upward from the substrate support surface. The substrate support surface may define an annular groove and/or ridge. A subset of the plurality of protrusions may be disposed within the annular groove and/or ridge. The substrate support assemblies may include a support stem coupled with the chuck body.

Abstract: Exemplary methods of semiconductor processing may include delivering a deposition precursor into a processing region of a semiconductor processing chamber. The methods may include depositing a layer of material on a substrate housed in the processing region of the semiconductor processing chamber. The processing region may be maintained at a first pressure during the deposition. The methods may include extending a baffle within the processing region. The baffle may modify a flow path within the processing region. The methods may include forming a plasma of a treatment or etch precursor within the processing region of the semiconductor processing chamber. The processing region may be maintained at a second pressure during the forming. The methods may include treating the layer of material deposited on the substrate with plasma effluents of the treatment precursor. The processes may be cycled any number of times.

Abstract: Exemplary methods of semiconductor processing may include delivering a deposition precursor into a processing region of a semiconductor processing chamber. The methods may include depositing a layer of material on a substrate housed in the processing region of the semiconductor processing chamber. The processing region may be maintained at a first pressure during the deposition. The methods may include extending a baffle within the processing region. The baffle may modify a flow path within the processing region. The methods may include forming a plasma of a treatment or etch precursor within the processing region of the semiconductor processing chamber. The processing region may be maintained at a second pressure during the forming. The methods may include treating the layer of material deposited on the substrate with plasma effluents of the treatment precursor. The processes may be cycled any number of times.

Abstract: Exemplary semiconductor processing chambers may include a chamber body. The chambers may include a substrate support disposed within the chamber body. The substrate support may define a substrate support surface. The chambers may include a showerhead positioned supported atop the chamber body. The substrate support and a bottom surface of the showerhead may at least partially define a processing region within the semiconductor processing chamber. The showerhead may define a plurality of apertures through the showerhead. The bottom surface of the showerhead may define an annular groove or ridge that is positioned directly above at least a portion of the substrate support.

Abstract: Exemplary substrate support assemblies may include a chuck body defining a substrate support surface. The substrate support surface may define a plurality of protrusions that extend upward from the substrate support surface. The substrate support surface may define an annular groove and/or ridge. A subset of the plurality of protrusions may be disposed within the annular groove and/or ridge. The substrate support assemblies may include a support stem coupled with the chuck body.

Abstract: Exemplary substrate support assemblies may include an electrostatic chuck body that defines a substrate support surface. The substrate support surface may define a plurality of protrusions that extend upward from the substrate support surface. A density of the plurality of protrusions within an outer region of the substrate support surface may be greater than in an inner region of the substrate support surface. The substrate support assemblies may include a support stem coupled with the electrostatic chuck body. The substrate support assemblies may include an electrode embedded within the electrostatic chuck body.

Abstract: Apparatus and methods for reducing undesirable residue material deposition and buildup on one or more surfaces within a processing chamber are provided herein. In embodiments disclosed herein, a processing chamber includes a chamber body having a chamber base, one or more sidewalls, and a chamber lid defining a processing volume; a showerhead disposed in the chamber lid and having a bottom surface adjacent the processing volume; and an isolator disposed between the chamber lid and the one or more sidewalls. The isolator includes a first end contacting the showerhead; a second end opposite the first end; an angled inner wall connected to the first end and extending radially outwardly from the first end towards the second end; and a lower inner wall at a different angle from the angled inner wall. The first end and the angled inner wall of the isolator form a first angle less than 90°.

Abstract: Exemplary substrate support assemblies may include an electrostatic chuck body defining a support surface that defines a substrate seat. The substrate support surface may include a dielectric coating. The substrate support assemblies may include a support stem coupled with the electrostatic chuck body. The substrate support assemblies may include a cooling hub positioned below a base of the support stem and coupled with a cooling fluid source. The electrostatic chuck body may define at least one cooling channel that is in communication with a cooling fluid source. The substrate support assemblies may include a heater embedded within the electrostatic chuck body. The substrate support assemblies may include an AC power rod extending through the support stem and electrically coupled with the heater. The substrate support assemblies may include a plurality of voids formed within the electrostatic chuck body between the at least one cooling channel and the heater.

Abstract: Exemplary deposition methods may include forming a plasma of an oxygen-containing precursor within a processing region of a semiconductor processing chamber. The processing region may house a semiconductor substrate on a substrate support. The methods may include, while maintaining the plasma of the oxygen-containing precursor, flowing a silicon-containing precursor through a faceplate into the processing region of the semiconductor processing chamber. The faceplate may have an impedance of at least 5.75 deciohm. The methods may include depositing a silicon-containing material on the semiconductor substrate.