Patents by Inventor Mayurachat Gulari

Mayurachat Gulari has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8870857
    Abstract: A waveguide neural interface device including: a neural device implantable in tissue and including an array of electrode sites that electrically communicate with their surroundings, in which the array of electrode sites includes at least one recording electrode site; and a waveguide, coupled to the neural device, that carries light along a longitudinal axis and includes a light directing element that redirects the carried light from the waveguide to illuminate selectively targeted tissue, in which at least a portion of the redirected light is directed laterally away from the longitudinal axis and the recording electrode site is configured to sample illuminated tissue. A method for assembling a waveguide neural interface device is also described.
    Type: Grant
    Filed: November 5, 2010
    Date of Patent: October 28, 2014
    Assignee: Greatbatch Ltd.
    Inventors: John P. Seymour, Mayurachat Gulari, Daryl R. Kipke, Kc Kong
  • Patent number: 8658465
    Abstract: The method of the preferred embodiments includes the steps of providing a base having a frame portion and a center portion; building a preliminary structure coupled to the base; removing a portion of the preliminary structure to define a series of devices and a plurality of bridges; removing the center portion of the base such that the frame portion defines an open region, wherein the plurality of bridges suspend the series of devices in the open region defined by the frame; and encapsulating the series of devices. The method is preferably designed for the manufacture of semiconductor devices, and more specifically for the manufacture of encapsulated implantable electrodes. The method, however, may be alternatively used in any suitable environment and for any suitable reason.
    Type: Grant
    Filed: July 2, 2012
    Date of Patent: February 25, 2014
    Assignee: NeuroNexus Technologies, Inc.
    Inventors: David S. Pellinen, Jamille Farraye Hetke, Daryl R. Kipke, Kc Kong, Rio J. Vetter, Mayurachat Gulari
  • Patent number: 8498720
    Abstract: The implantable electrode system of the preferred embodiments includes a conductor, an interconnect coupled to the conductor, an insulator that insulates the interconnect, and an anchor that is connected to both the conductor and the insulating element. The anchor is mechanically interlocked with at least one of the conductor and the insulator.
    Type: Grant
    Filed: March 2, 2009
    Date of Patent: July 30, 2013
    Assignee: NeuroNexus Technologies, Inc.
    Inventors: David S. Pellinen, Mayurachat Gulari, Jamille Farraye Hetke, David J. Anderson, Daryl R. Kipke, Rio J. Vetter
  • Publication number: 20120267775
    Abstract: The method of the preferred embodiments includes the steps of providing a base having a frame portion and a center portion; building a preliminary structure coupled to the base; removing a portion of the preliminary structure to define a series of devices and a plurality of bridges; removing the center portion of the base such that the frame portion defines an open region, wherein the plurality of bridges suspend the series of devices in the open region defined by the frame; and encapsulating the series of devices. The method is preferably designed for the manufacture of semiconductor devices, and more specifically for the manufacture of encapsulated implantable electrodes. The method, however, may be alternatively used in any suitable environment and for any suitable reason.
    Type: Application
    Filed: July 2, 2012
    Publication date: October 25, 2012
    Applicant: NeuroNexus Technologies, Inc.
    Inventors: David S. Pellinen, Jamille Farraye Hetke, Kc Kong, Daryl R. Kipke, Rio J. Vetter, Mayurachat Gulari
  • Patent number: 8241950
    Abstract: The method of the preferred embodiments includes the steps of providing a base having a frame portion and a center portion; building a preliminary structure coupled to the base; removing a portion of the preliminary structure to define a series of devices and a plurality of bridges; removing the center portion of the base such that the frame portion defines an open region, wherein the plurality of bridges suspend the series of devices in the open region defined by the frame; and encapsulating the series of devices. The method is preferably designed for the manufacture of semiconductor devices, and more specifically for the manufacture of encapsulated implantable electrodes. The method, however, may be alternatively used in any suitable environment and for any suitable reason.
    Type: Grant
    Filed: May 30, 2008
    Date of Patent: August 14, 2012
    Assignee: Neuronexus Technologies, Inc.
    Inventors: David S. Pellinen, Jamille Farraye Hetke, Daryl R. Kipke, Kc Kong, Rio J. Vetter, Mayurachat Gulari
  • Publication number: 20090240314
    Abstract: One embodiment of the invention includes an implantable electrode lead system that includes a series of shims stacked upon each other, a series of first components, and a series of second components connected to the series of first components through a series of connectors. One of the first components extends from one of the shims, and another of the first components extends from another one of the shims. The shims position the first components in a three dimensional arrangement.
    Type: Application
    Filed: March 24, 2009
    Publication date: September 24, 2009
    Inventors: K. C. Kong, Jamille Farraye Hetke, James A. Wiler, David S. Pellinen, Mayurachat Gulari
  • Publication number: 20090234426
    Abstract: The implantable electrode system of the preferred embodiments include a conductor, an interconnect coupled to the conductor, an insulator that insulates the interconnect, and an anchor that is connected to both the conductor and the insulating element, wherein the anchor is mechanically interlocked with at least one of the conductor and the insulator.
    Type: Application
    Filed: March 2, 2009
    Publication date: September 17, 2009
    Inventors: David S. Pellinen, Mayurachat Gulari, Jamille Farraye Hetke, David J. Anderson, Daryl R. Kipke, Rio J. Vetter
  • Publication number: 20090102068
    Abstract: The method of the preferred embodiments includes the steps of providing a base having a frame portion and a center portion; building a preliminary structure coupled to the base; removing a portion of the preliminary structure to define a series of devices and a plurality of bridges; removing the center portion of the base such that the frame portion defines an open region, wherein the plurality of bridges suspend the series of devices in the open region defined by the frame; and encapsulating the series of devices. The method is preferably designed for the manufacture of semiconductor devices, and more specifically for the manufacture of encapsulated implantable electrodes. The method, however, may be alternatively used in any suitable environment and for any suitable reason.
    Type: Application
    Filed: May 30, 2008
    Publication date: April 23, 2009
    Inventors: David S. Pellinen, Jamille Farraye Hetke, Daryl R. Kipke, K. C. Kong, Rio J. Vetter, Mayurachat Gulari
  • Publication number: 20070007240
    Abstract: Disclosed herein is a method of fabricating a device having a microstructure. The method includes forming a connector on a semiconductor substrate, coating the connector with a polymer layer, and immersing the semiconductor substrate and the coated connector in an etchant solution to form the microstructure from the semiconductor substrate and to release the coated connector and the microstructure from the semiconductor substrate such that the microstructure remains coupled to a further element of the device via the coated connector. In some cases, the microstructure is defined by forming an etch stop in the semiconductor substrate, and the microstructure and the semiconductor substrate are coated with a polymer layer, which may then be selectively patterned. The microstructure may then be released from the semiconductor substrate in accordance with the etch stop.
    Type: Application
    Filed: May 25, 2006
    Publication date: January 11, 2007
    Applicant: THE REGENTS OF THE UNIVERSITY OF MICHIGAN
    Inventors: Kensall Wise, Mayurachat Gulari, Ying Yao