Patents by Inventor Mazhar I. Memon

Mazhar I. Memon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10819638
    Abstract: In an embodiment, a method includes identifying a core of a multicore processor to which an incoming packet that is received in a packet buffer is to be directed, and if the core is powered down, transmitting a first message to cause the core to be powered up prior to arrival of the incoming packet at a head of the packet buffer. Other embodiments are described and claimed.
    Type: Grant
    Filed: September 21, 2017
    Date of Patent: October 27, 2020
    Assignee: Intel Corporation
    Inventors: Steen K. Larsen, Bryan E. Veal, Daniel S. Lake, Travis T. Schluessler, Mazhar I. Memon
  • Patent number: 10447604
    Abstract: In an embodiment, an apparatus is provided that may include an integrated circuit including switch circuitry to determine, at least in part, an action to be executed3 involving a packet. This determination may be based, at least in part, upon flow information determined, at least in part, from the packet, and packet processing policy information. The circuitry may examine the policy information to determine whether a previously-established packet processing policy has been established that corresponds, at least in part, to the flow information. If the circuitry determines, at least in part, that the policy has not been established and the packet is a first packet in a flow corresponding at least in part to the flow information, the switch circuitry may request that at least one switch control program module establish, at least in part, a new packet processing policy corresponding, at least in part, to the flow information.
    Type: Grant
    Filed: June 5, 2017
    Date of Patent: October 15, 2019
    Assignee: Intel Corporation
    Inventors: Mazhar I. Memon, Steven R. King
  • Patent number: 10133570
    Abstract: A processor includes packed data registers, and a decode unit to decode a data element selection and consolidation instruction. The instruction is to have a first source packed data operand that is to have a plurality of data elements, and a second source operand that is to have a plurality of mask elements. Each mask element corresponds to a different data element in the same relative position. An execution unit is coupled with the decode unit. The execution unit, in response to the instruction, is to store a result packed data operand in a destination storage location that is to be indicated by the instruction. The result packed data operand is to include all data elements of the first source packed data operand, which correspond to unmasked mask elements of the second source operand, consolidated together in a portion of the result packed data operand.
    Type: Grant
    Filed: September 19, 2014
    Date of Patent: November 20, 2018
    Assignee: INTEL CORPORATION
    Inventor: Mazhar I Memon
  • Patent number: 9876720
    Abstract: In an embodiment, a method includes identifying a core of a multicore processor to which an incoming packet that is received in a packet buffer is to be directed, and if the core is powered down, transmitting a first message to cause the core to be powered up prior to arrival of the incoming packet at a head of the packet buffer. Other embodiments are described and claimed.
    Type: Grant
    Filed: February 23, 2015
    Date of Patent: January 23, 2018
    Assignee: Intel Corporation
    Inventors: Steen K. Larsen, Bryan E. Veal, Daniel S. Lake, Travis T. Schluessler, Mazhar I. Memon
  • Publication number: 20180013676
    Abstract: In an embodiment, a method includes identifying a core of a multicore processor to which an incoming packet that is received in a packet buffer is to be directed, and if the core is powered down, transmitting a first message to cause the core to be powered up prior to arrival of the incoming packet at a head of the packet buffer. Other embodiments are described and claimed.
    Type: Application
    Filed: September 21, 2017
    Publication date: January 11, 2018
    Inventors: Steen K. Larsen, Bryan E. Veal, Daniel S. Lake, Travis T. Schluessler, Mazhar I. Memon
  • Publication number: 20170339060
    Abstract: In an embodiment, an apparatus is provided that may include an integrated circuit including switch circuitry to determine, at least in part, an action to be executed involving a packet. This determination may be based, at least in part, upon flow information determined, at least in part, from the packet, and packet processing policy information. The circuitry may examine the policy information to determine whether a previously-established packet processing policy has been established that corresponds, at least in part, to the flow information. If the circuitry determines, at least in part, that the policy has not been established and the packet is a first packet in a flow corresponding at least in part to the flow information, the switch circuitry may request that at least one switch control program module establish, at least in part, a new packet processing policy corresponding, at least in part, to the flow information.
    Type: Application
    Filed: June 5, 2017
    Publication date: November 23, 2017
    Applicant: Intel Corporation
    Inventors: Mazhar I. Memon, Steven R. King
  • Patent number: 9674097
    Abstract: In an embodiment, an apparatus is provided that may include an integrated circuit including switch circuitry to determine, at least in part, an action to be executed involving a packet. This determination may be based, at least in part, upon flow information determined, at least in part, from the packet, and packet processing policy information. The circuitry may examine the policy information to determine whether a previously-established packet processing policy has been established that corresponds, at least in part, to the flow information. If the circuitry determines, at least in part, that the policy has not been established and the packet is a first packet in a flow corresponding at least in part to the flow information, the switch circuitry may request that at least one switch control program module establish, at least in part, a new packet processing policy corresponding, at least in part, to the flow information.
    Type: Grant
    Filed: December 8, 2014
    Date of Patent: June 6, 2017
    Assignee: Intel Corporation
    Inventors: Mazhar I. Memon, Steven R. King
  • Publication number: 20160085547
    Abstract: A processor includes packed data registers, and a decode unit to decode a data element selection and consolidation instruction. The instruction is to have a first source packed data operand that is to have a plurality of data elements, and a second source operand that is to have a plurality of mask elements. Each mask element corresponds to a different data element in the same relative position. An execution unit is coupled with the decode unit. The execution unit, in response to the instruction, is to store a result packed data operand in a destination storage location that is to be indicated by the instruction. The result packed data operand is to include all data elements of the first source packed data operand, which correspond to unmasked mask elements of the second source operand, consolidated together in a portion of the result packed data operand.
    Type: Application
    Filed: September 19, 2014
    Publication date: March 24, 2016
    Applicant: INTEL CORPORATION
    Inventor: Mazhar I. Memon
  • Publication number: 20150195206
    Abstract: In an embodiment, an apparatus is provided that may include an integrated circuit including switch circuitry to determine, at least in part, an action to be executed involving a packet. This determination may be based, at least in part, upon flow information determined, at least in part, from the packet, and packet processing policy information. The circuitry may examine the policy information to determine whether a previously-established packet processing policy has been established that corresponds, at least in part, to the flow information. If the circuitry determines, at least in part, that the policy has not been established and the packet is a first packet in a flow corresponding at least in part to the flow information, the switch circuitry may request that at least one switch control program module establish, at least in part, a new packet processing policy corresponding, at least in part, to the flow information.
    Type: Application
    Filed: December 8, 2014
    Publication date: July 9, 2015
    Applicant: INTEL CORPORATION
    Inventors: Mazhar I. Memon, Steven R. King
  • Publication number: 20150163143
    Abstract: In an embodiment, a method includes identifying a core of a multicore processor to which an incoming packet that is received in a packet buffer is to be directed, and if the core is powered down, transmitting a first message to cause the core to be powered up prior to arrival of the incoming packet at a head of the packet buffer. Other embodiments are described and claimed.
    Type: Application
    Filed: February 23, 2015
    Publication date: June 11, 2015
    Inventors: Steen K. Larsen, Bryan E. Veal, Daniel S. Lake, Travis T. Schluessler, Mazhar I. Memon
  • Patent number: 8984309
    Abstract: In one embodiment, the present invention includes a method for receiving an incoming packet in a packet buffer and associating it with a flow identifier. Based on the flow identifier, a core to which the incoming packet is to be directed may be determined, and a power management hint can be transmitted to cause the core to be powered up. Other embodiments are described and claimed.
    Type: Grant
    Filed: November 21, 2008
    Date of Patent: March 17, 2015
    Assignee: Intel Corporation
    Inventors: Mazhar I. Memon, Steen K. Larsen, Bryan E. Veal, Daniel S. Lake, Travis T. Schluessler
  • Patent number: 8934344
    Abstract: In an embodiment, an apparatus is provided that may include an integrated circuit including switch circuitry to determine, at least in part, an action to be executed involving a packet. This determination may be based, at least in part, upon flow information determined, at least in part, from the packet, and packet processing policy information. The circuitry may examine the policy information to determine whether a previously-established packet processing policy has been established that corresponds, at least in part, to the flow information. If the circuitry determines, at least in part, that the policy has not been established and the packet is a first packet in a flow corresponding at least in part to the flow information, the switch circuitry may request that at least one switch control program module establish, at least in part, a new packet processing policy corresponding, at least in part, to the flow information.
    Type: Grant
    Filed: January 29, 2014
    Date of Patent: January 13, 2015
    Assignee: Intel Corporation
    Inventors: Mazhar I. Memon, Steven R. King
  • Publication number: 20140146675
    Abstract: In an embodiment, an apparatus is provided that may include an integrated circuit including switch circuitry to determine, at least in part, an action to be executed involving a packet. This determination may be based, at least in part, upon flow information determined, at least in part, from the packet, and packet processing policy information. The circuitry may examine the policy information to determine whether a previously-established packet processing policy has been established that corresponds, at least in part, to the flow information. If the circuitry determines, at least in part, that the policy has not been established and the packet is a first packet in a flow corresponding at least in part to the flow information, the switch circuitry may request that at least one switch control program module establish, at least in part, a new packet processing policy corresponding, at least in part, to the flow information.
    Type: Application
    Filed: January 29, 2014
    Publication date: May 29, 2014
    Inventors: Mazhar I. Memon, Steven R. King
  • Patent number: 8675491
    Abstract: In an embodiment, an apparatus is provided that may include an integrated circuit including switch circuitry to determine, at least in part, an action to be executed involving a packet. This determination may be based, at least in part, upon flow information determined, at least in part, from the packet, and packet processing policy information. The circuitry may examine the policy information to determine whether a previously-established packet processing policy has been established that corresponds, at least in part, to the flow information. If the circuitry determines, at least in part, that the policy has not been established and the packet is a first packet in a flow corresponding at least in part to the flow information, the switch circuitry may request that at least one switch control program module establish, at least in part, a new packet processing policy corresponding, at least in part, to the flow information.
    Type: Grant
    Filed: August 31, 2011
    Date of Patent: March 18, 2014
    Assignee: Intel Corporation
    Inventors: Mazhar I. Memon, Steven R. King
  • Publication number: 20110310909
    Abstract: In an embodiment, an apparatus is provided that may include an integrated circuit including switch circuitry to determine, at least in part, an action to be executed involving a packet. This determination may be based, at least in part, upon flow information determined, at least in part, from the packet, and packet processing policy information. The circuitry may examine the policy information to determine whether a previously-established packet processing policy has been established that corresponds, at least in part, to the flow information. If the circuitry determines, at least in part, that the policy has not been established and the packet is a first packet in a flow corresponding at least in part to the flow information, the switch circuitry may request that at least one switch control program module establish, at least in part, a new packet processing policy corresponding, at least in part, to the flow information.
    Type: Application
    Filed: August 31, 2011
    Publication date: December 22, 2011
    Inventors: Mazhar I. Memon, Steven R. King
  • Patent number: 8031606
    Abstract: In an embodiment, an apparatus is provided that may include an integrated circuit including switch circuitry to determine, at least in part, an action to be executed involving a packet. This determination may be based, at least in part, upon flow information determined, at least in part, from the packet, and packet processing policy information. The circuitry may examine the policy information to determine whether a previously-established packet processing policy has been established that corresponds, at least in part, to the flow information. If the circuitry determines, at least in part, that the policy has not been established and the packet is a first packet in a flow corresponding at least in part to the flow information, the switch circuitry may request that at least one switch control program module establish, at least in part, a new packet processing policy corresponding, at least in part, to the flow information.
    Type: Grant
    Filed: June 24, 2008
    Date of Patent: October 4, 2011
    Assignee: Intel Corporation
    Inventors: Mazhar I. Memon, Steven R. King
  • Publication number: 20100131781
    Abstract: In one embodiment, the present invention includes a method for receiving an incoming packet in a packet buffer and associating it with a flow identifier. Based on the flow identifier, a core to which the incoming packet is to be directed may be determined, and a power management hint can be transmitted to cause the core to be powered up. Other embodiments are described and claimed.
    Type: Application
    Filed: November 21, 2008
    Publication date: May 27, 2010
    Inventors: Mazhar I. Memon, Steen K. Larsen, Bryan E. Veal, Daniel S. Lake, Travis T. Schluessler
  • Publication number: 20090316711
    Abstract: In an embodiment, an apparatus is provided that may include an integrated circuit including switch circuitry to determine, at least in part, an action to be executed involving a packet. This determination may be based, at least in part, upon flow information determined, at least in part, from the packet, and packet processing policy information. The circuitry may examine the policy information to determine whether a previously-established packet processing policy has been established that corresponds, at least in part, to the flow information. If the circuitry determines, at least in part, that the policy has not been established and the packet is a first packet in a flow corresponding at least in part to the flow information, the switch circuitry may request that at least one switch control program module establish, at least in part, a new packet processing policy corresponding, at least in part, to the flow information.
    Type: Application
    Filed: June 24, 2008
    Publication date: December 24, 2009
    Inventors: Mazhar I. Memon, Steven R. King