Patents by Inventor MD A. Rahman

MD A. Rahman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11995812
    Abstract: Methods and systems for inspecting a product, such as a wire harness, including product features for inspection. A camera of an inspection station may capture a product image. A machine learning (ML) model may detect one or more objects in the captured product image and provide, for each detected object, an identification of a class of the detected object and an identification of a region of the detected object in the captured product image. The class of the detected object may be either an acceptable product feature class or an unacceptable product feature class. The inspection station may display an enhanced product image that includes the captured product image to which the identification of the class of the detected object and the identification of the region of the detected object in the captured product image for each detected object have been added.
    Type: Grant
    Filed: June 29, 2022
    Date of Patent: May 28, 2024
    Assignee: Electrical Components International, Inc.
    Inventors: Kyryll Zaytsev, Jarred Knecht, Hafizur Md Rahman, Ahmad Raza, Prabhjyot Gill, Vikrant Vikrant, Sandeep Annabathuni
  • Publication number: 20240126680
    Abstract: Various examples relate to apparatuses, devices, methods and computer programs for allocating memory. An apparatus comprises interface circuitry, machine-readable instructions, and processor circuitry to execute the machine-readable instructions to process instructions of a software application of a local processing element participating in a partitioned global address space, allocate, upon processing an instruction for allocating memory on a symmetric heap being used across a plurality of processing elements participating in the partitioned global address space, memory on the symmetric heap, wherein, if the instruction for allocating memory indicates that memory is to be allocated with a variable size, the memory allocated on the symmetric heap has a size that is specific for the local processing element.
    Type: Application
    Filed: December 21, 2023
    Publication date: April 18, 2024
    Inventors: David KEPPEL, David OZOG, Lawrence STEWART, Sri Raj PAUL, Md RAHMAN
  • Publication number: 20240005471
    Abstract: Methods and systems for inspecting a product, such as a wire harness, including product features for inspection. A camera of an inspection station may capture a product image. A machine learning (ML) model may detect one or more objects in the captured product image and provide, for each detected object, an identification of a class of the detected object and an identification of a region of the detected object in the captured product image. The class of the detected object may be either an acceptable product feature class or an unacceptable product feature class. The inspection station may display an enhanced product image that includes the captured product image to which the identification of the class of the detected object and the identification of the region of the detected object in the captured product image for each detected object have been added.
    Type: Application
    Filed: June 29, 2022
    Publication date: January 4, 2024
    Applicant: Electrical Components International, Inc.
    Inventors: Kyryll Zaytsev, Jarred Knecht, Hafizur Md Rahman, Ahmad Raza, Prabhjyot Gill, Vikrant Vikrant, Sandeep Annabathuni
  • Patent number: 10554203
    Abstract: In some examples, the disclosure includes a circuit including a power field effect transistor (FET), a gate pull-down circuit, a pull-down bias circuit, and a radio frequency (RF) detector coupled to the source terminal of the power FET and the pull-down bias circuit. In an example, the RF detector circuit is configured to detect a presence of an alternating current signal at a source terminal of the power FET when the power FET is in a non-conductive state and control the pull-down bias circuit to bias the gate pull-down circuit to create a low impedance path between a gate terminal of the power FET and the source terminal of the power FET when the power FET is in the non-conductive state and the alternating current signal is present at the source terminal of the power FET.
    Type: Grant
    Filed: November 30, 2018
    Date of Patent: February 4, 2020
    Assignee: Texas Instruments Incorporated
    Inventors: Sualp Aras, Eung Jung Kim, Abidur Md Rahman
  • Patent number: 9612938
    Abstract: In accordance with embodiments disclosed herein, there is provided systems and methods for providing status of a processing device with a periodic synchronization point in an instruction tracing system. For example, the method may include generating a boundary packet based on a unique byte pattern in a packet log. The boundary packet provides a starting point for packet decode. The method may also include generating a plurality of state packets based on status information of the processor. The plurality of state packets follows the boundary packet when outputted into the packet log.
    Type: Grant
    Filed: May 16, 2013
    Date of Patent: April 4, 2017
    Assignee: Intel Corporation
    Inventors: Frank Binns, Matthew C. Merten, Mayank Bomb, Beeman C. Strong, Peter Lachner, Jason W. Brandt, Itamar Kazachinsky, Ofer Levy, Md A. Rahman
  • Publication number: 20150006868
    Abstract: In accordance with embodiments disclosed herein, there is provided systems and methods for minimizing bandwidth to compress an output stream of an instruction tracing system. For example, the method may include identifying a current instruction in a trace of the IT module as a conditional branch (CB) instruction. The method includes executing one of generating a CB packet including a byte pattern with an indication of outcome of the CB instruction, or adding an indication of the outcome of the CB instruction to the byte pattern of an existing CB packet. The method includes generating a packet when a subsequent instruction in the trace is not the CB instruction. The packet is different from the CB packet. The method also includes adding the packet into a deferred queue when the packet is deferrable. The method further includes outputting the CB packet followed by the deferred packet into a packet log.
    Type: Application
    Filed: June 28, 2013
    Publication date: January 1, 2015
    Inventors: Ilya Wagner, Matthew C. Merten, Frank Binns, Christine E. Wang, Mayank Bomb, Tong Li, Thilo Schmitt, MD A. Rahman
  • Publication number: 20140344552
    Abstract: In accordance with embodiments disclosed herein, there is provided systems and methods for providing status of a processing device with a periodic synchronization point in an instruction tracing system. For example, the method may include generating a boundary packet based on a unique byte pattern in a packet log. The boundary packet provides a starting point for packet decode. The method may also include generating a plurality of state packets based on status information of the processor. The plurality of state packets follows the boundary packet when outputted into the packet log.
    Type: Application
    Filed: May 16, 2013
    Publication date: November 20, 2014
    Inventors: Frank Binns, Matthew C. Merten, Mayank Bomb, Beeman C. Strong, Peter Lachner, Jason W. Brandt, Itamar Kazachinsky, Ofer Levy, MD A. Rahman
  • Patent number: 7647810
    Abstract: A solid particle counting system for measuring solid particle number concentrations from engine or vehicle exhausts in real-time includes an evaporation unit, a diluter arrangement, and a particle counter. The diluter arrangement mixes the dilution gas with the gases from the evaporation unit at a dilution ratio, and the diluter arrangement includes a flow meter located upstream of the evaporation unit for measuring the flow of gases into the evaporation unit which, in turn, flow into the diluter arrangement.
    Type: Grant
    Filed: December 21, 2006
    Date of Patent: January 19, 2010
    Assignee: Horiba Ltd.
    Inventors: Qiang Wei, Scott T. Porter, Ichiro Asano, Montajir MD. Rahman, Takeshi Kusaka
  • Publication number: 20090094950
    Abstract: A penetration and removal efficiency calibration unit for a volatile particle remover in a solid particle counting system provides an accurate and efficient approach to calibration. The calibration unit includes an aerosol inlet, a flow meter downstream of the aerosol inlet, and a mixer. The flow meter receives the aerosol flow from the aerosol inlet and provides an output flow to the mixer. The mixer receives the output flow from the flow meter and also has a dilution gas inlet. The mixer provides a mixer output flow for reception by the volatile particle remover or particle counter. A first flow controller controls flow into the dilution gas inlet. The calibration unit also includes a bypass inlet. A second flow controller controls flow into the bypass inlet, and a control loop controls the bypass flow such that the aerosol flow tracks a reference value.
    Type: Application
    Filed: October 16, 2007
    Publication date: April 16, 2009
    Applicant: HORIBA, LTD.
    Inventors: Qiang Wei, Montajir MD. Rahman, Michael Akard
  • Publication number: 20080148874
    Abstract: A solid particle counting system for measuring solid particle number concentrations from engine or vehicle exhausts in real-time includes an evaporation unit, a diluter arrangement, and a particle counter. The diluter arrangement mixes the dilution gas with the gases from the evaporation unit at a dilution ratio, and the diluter arrangement includes a flow meter located upstream of the evaporation unit for measuring the flow of gases into the evaporation unit which, in turn, flow into the diluter arrangement.
    Type: Application
    Filed: December 21, 2006
    Publication date: June 26, 2008
    Inventors: Qiang Wei, Scott T. Porter, Ichiro Asano, Montajir MD. Rahman, Takeshi Kusaka
  • Publication number: 20080148812
    Abstract: A solid particle counting system for measuring solid particle number concentrations from engine or vehicle exhausts in real-time includes a diluter arrangement, a particle counter, and a flow splitter. The diluter arrangement mixes the dilution gas with flowing sample gases. The flow splitter receives the output flow from the diluter arrangement, provides a portion of this flow to the particle counter, and provides a by-pass flow that is received by a vacuum pump. A second flow route to the particle counter includes a valve arranged such that opening the valve during the starting of the vacuum pump reduces a pressure pulse at the particle counter caused by the starting of the vacuum pump, thereby avoiding work fluid backflow from the particle counter prior to the vacuum pump stabilizing.
    Type: Application
    Filed: December 21, 2006
    Publication date: June 26, 2008
    Inventors: Qiang Wei, Scott T. Porter, Ichiro Asano, Montajir MD. Rahman, Takeshi Kusaka
  • Publication number: 20080148870
    Abstract: A solid particle counting system for measuring solid particle number concentrations from engine or vehicle exhausts in real-time includes a flow splitter having an inlet, a sample outlet, and a by-pass outlet arranged such that a main flow enters the inlet and changes direction to exit the by-pass outlet. A sample flow from the main flow exits the sample outlet. The flow splitter further includes a guiding element arranged such that particles at a sampling location upstream of the main flow direction change are guided to the sample outlet.
    Type: Application
    Filed: December 21, 2006
    Publication date: June 26, 2008
    Inventors: Qiang Wei, Scott T. Porter, Ichiro Asano, Montajir MD. Rahman, Takeshi Kusaka
  • Publication number: 20070049991
    Abstract: A method for telemetry between an implantable medical device and an external programming component is disclosed. The telemetry circuitry of the implantable device is initially powered on for only a portion of the time needed to receive the entirety of a wake-up signal from the external component. During that time, only a first portion of the wake-up signal as received form the external component is checked against the implantable device's understanding of that first portion as stored in its memory. If the implantable device does not recognize the received first portion, powering on of the telemetry circuitry is terminated. However, if that first portion is recognized, then the implantable device continues to power on the telemetry circuitry to receive another (second) portion of the wake-up signal. If that received second portion is recognized, then the telemetry circuitry is further powered to receive a next (third) portion of the wake-up signal from the external component, etc.
    Type: Application
    Filed: August 30, 2005
    Publication date: March 1, 2007
    Inventors: Daniel Klostermann, Md. Rahman
  • Publication number: 20060085710
    Abstract: Methods and apparatus to test memories, such as, for example, caches of processors, are disclosed. In one aspect, an apparatus may include a pseudo random address generation unit, such as, for example, including a linear feedback shift register, to generate pseudo random memory addresses, and a deterministic data generation unit, such as, for example, including a state machine, to generate deterministic data to be written to the pseudo random memory addresses. Computer systems and other electronic systems including such apparatus are also disclosed.
    Type: Application
    Filed: September 30, 2004
    Publication date: April 20, 2006
    Inventors: Michael Spica, Hehching Li, Md Rahman