Patents by Inventor Md Hasnine

Md Hasnine has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260334277
    Abstract: A circuit package includes a die, a gold backing layer adhered to a top side of the die, a conductive post projecting from the bottom side of the die, and a conductive via electrically coupling the conductive post to the gold backing layer. The circuit package also includes a substrate including a conductive pad, a solder bond coupling the conductive post to the conductive pad, a cured underfill layer positioned between the die and the substrate and coupling the die to the substrate, a cured molding compound surrounding the die and coupling the die to the substrate, and at least one interlayer coupling the gold backing layer to the molding compound.
    Type: Application
    Filed: March 19, 2026
    Publication date: October 22, 2026
    Inventor: Md Hasnine
  • Patent number: 12765414
    Abstract: A system in package (SiP) with an air cavity is disclosed. In one aspect, a technique to bond a lid over the air cavity that reduces the risk of cavity integrity failure is provided. More specifically, an epoxy seal is created on four walls of a lid enclosing the cavity. A further sputtered metal layer is added over the epoxy seal to provide additional structural rigidity, electromagnetic emission suppression and to assist in preventing leaks through the epoxy seal.
    Type: Grant
    Filed: May 16, 2023
    Date of Patent: October 13, 2026
    Assignee: Qorvo US, Inc.
    Inventors: MD Hasnine, Christine Blair, Thomas Scott Morris, Neftali Salazar
  • Publication number: 20260282931
    Abstract: Aspects of the disclosure provide a semiconductor package and a method of producing the same. The disclosed semiconductor package includes a laminate; a plurality of wire bond dies attached to the laminate; and a lid attached to the laminate via a lid seal epoxy, the lid comprising a plurality of compartments configured to encase the plurality of wire bond dies and form cavities with each cavity encapsulating a wire bond die. In various embodiments, each compartment may include a first wall that is coated with an electromagnetic shielding material and a second wall that is free of the material coated on the first wall. In various embodiments, the lid may include a vent hole configured to release vapor pressure during attachment of the lid to the laminate. In various embodiments, a wireless device includes the disclosed semiconductor package.
    Type: Application
    Filed: December 2, 2025
    Publication date: September 17, 2026
    Inventor: MD Hasnine
  • Publication number: 20260283051
    Abstract: An air cavity lid is disclosed. In one aspect, a semiconductor die is placed on a laminate and a lid is placed thereover to form an air cavity. The lid is attached to the laminate. To assist in preventing the bond between the lid and the laminate from failing (e.g., during a subsequent reflow step), the lid includes one or more surface area expanding features. These features expand the amount of surface area available to attach to bonding material, thereby increasing the mechanical bond between the laminate and the lid. This increased bond helps assure passage of gross leak testing after subsequent processing steps (e.g., reflow).
    Type: Application
    Filed: February 10, 2026
    Publication date: September 17, 2026
    Inventors: MD Hasnine, Charles E. Carpenter
  • Patent number: 12733519
    Abstract: Multichip module thermal management through backside metal systems and methods are disclosed. In one aspect, a multichip module includes one or more flip chip integrated circuits (ICs), each having a backside to which a metal heat conductor or spreader is attached. The presence of the metal heat conductor on the backside of the flip chip ICs allows for a better thermal path to remove heat from the ICs relative to the substrate. The improved thermal path reduces the likelihood of damage to the ICs or delamination of the module. A variety of methods are proposed to construct the backside metal systems. Additionally, a variety of capture features may be used to assist in structural integrity.
    Type: Grant
    Filed: March 24, 2023
    Date of Patent: September 8, 2026
    Assignee: Qorvo US, Inc.
    Inventors: MD Hasnine, Mark C. Woods, Neftali Salazar, Smreeti Dahariya, Christine Blair
  • Publication number: 20260150679
    Abstract: Aspects of the disclosure provide a semiconductor package and a method of producing the same. The disclosed semiconductor package includes a substrate; an interposer attached to the substrate, the interposer comprising one or more through vias across the interposer; a flip-chip (FC) die attached to the interposer via a plurality of copper posts; and a silicon carbide (SiC) heat spreader disposed on atop the FC die via a layer of sinter material. In various embodiments, a wireless device may include the disclosed semiconductor package. In one or more embodiments, a wireless device may include the semiconductor package produced via the method as disclosed herein.
    Type: Application
    Filed: October 8, 2025
    Publication date: May 28, 2026
    Inventors: MD Hasnine, Charles Edward Carpenter
  • Publication number: 20260137012
    Abstract: Aspects of the disclosure provide a semiconductor package and one or more methods of producing the same. The disclosed semiconductor package includes a lead-frame substrate; a first die attached to a first side of the substrate via a first layer of a coefficient of thermal expansion (CTE)-matched copper paste at a first location on the first side of the substrate; a first set of copper clips attached to the first die and a second location on the first side of the substrate via a second layer of CTE-matched copper paste; a second die attached to the first die via a third layer of CTE-matched copper paste; and a second set of copper clips attached to the second die and a third location on the first side of the substrate via a fourth layer of CTE-matched copper paste. In various embodiments, a wireless device includes the disclosed semiconductor package.
    Type: Application
    Filed: September 5, 2025
    Publication date: May 14, 2026
    Inventor: MD Hasnine
  • Publication number: 20260096497
    Abstract: Ball grid array (BGA) structures for drop-shock performance are disclosed. In one aspect, balls within the BGA may have a copper core plated with a highly ductile solder. In exemplary aspects, the copper is coated with an indium solder. A nickel barrier may optionally be positioned between the copper and the indium to prevent the formation of intermetallic compounds (IMCs) between the copper and indium. The high ductility of the copper allows plastic deformation during drop-shock events, while the indium provides the desired soldering function.
    Type: Application
    Filed: July 9, 2025
    Publication date: April 2, 2026
    Inventor: MD Hasnine
  • Publication number: 20260076199
    Abstract: The present disclosure relates to a microelectronics module featuring thermal interface material (TIM) containment for efficient and reliable top-side cooling, and a process for making the same. The microelectronics module includes a module substrate, a flip-chip die attached to the module substrate, and a heat spreader positioned above and thermally coupled to the flip-chip die. A TIM barrier, partially embedded in a mold compound, continuously surrounds the heat spreader and protrudes vertically beyond the heat spreader to define a TIM cavity over the heat spreader. A TIM section fills the TIM cavity to cover the heat spreader. A heat sink is in contact with both the TIM section and the TIM barrier, where the TIM barrier is configured to prevent the TIM section from shifting away from over the heat spreader, thereby maintaining thermal coupling between the heat sink and the heat spreader through the TIM section.
    Type: Application
    Filed: August 1, 2025
    Publication date: March 12, 2026
    Inventors: MD Hasnine, Matthew Essar
  • Publication number: 20260068658
    Abstract: The present disclosure relates to a radio frequency (RF) package with air cavities for wide bandgap semiconductors and double-sided cooling, and a process for making the same. The disclosed RF package includes a carrier board, an electrical module with a module substrate over the carrier board, an interposer over the module substrate, a flip-chip die, a heat spreader, a mold compound, a shielding structure covering the electrical module to provide a shielded module, and a heat sink over the shielded module. Herein, the flip-chip die is attached to the interposer, and the heat spreader is attached to the interposer to provide an air-cavity, within which the flip-chip die is located. The interposer, the flip-chip die, and the heat spreader are thermally coupled with each other. The mold compound resides over the module substrate and surrounds the interposer and the heat spreader without being in contact with the flip-chip die.
    Type: Application
    Filed: August 19, 2025
    Publication date: March 5, 2026
    Inventors: MD Hasnine, Neftali Salazar
  • Publication number: 20260040942
    Abstract: The present disclosure relates to a microelectronics package with a stacked arrangement, which enables efficient thermal paths for both top-side cooling and bottom-side cooling, and a process for making the same. The disclosed microelectronics package includes a carrier board, a first sub-package attached to the carrier board, and a second sub-package vertically stacked with the first sub-package. Herein, each of the first sub-package and the second sub-package includes a substrate, a flip-chip die attached to the corresponding substrate, and a heat spreader attached to the corresponding substrate and completely covering and thermally connected to the corresponding flip-chip die. The second sub-package is thermally connected to the heat spreader of the first sub-package. The substrate within the second sub-package is different from and has a higher thermal conductivity than the substrate within the first sub-package, and is thermally connected to the flip-chip die of the second sub-package.
    Type: Application
    Filed: July 8, 2025
    Publication date: February 5, 2026
    Inventors: MD Hasnine, Peter Haase
  • Publication number: 20260018480
    Abstract: Systems and methods are disclosed herein to enable top-side and/or bottom-side cooling for double-sided molded (DSM) packages, thereby providing an enhanced thermal pathway to the ambient environment for densely packed DSM packages.
    Type: Application
    Filed: June 27, 2025
    Publication date: January 15, 2026
    Inventors: MD Hasnine, Charles E. Carpenter, Thomas Scott Morris
  • Publication number: 20260018486
    Abstract: The present disclosure provides a packaging device and a method to form the packaging device. The packaging device includes a package base, a die structure disposed over the package base, and a package lid over the die structure. The package lid is thermally coupled with the die structure and the package base.
    Type: Application
    Filed: June 10, 2025
    Publication date: January 15, 2026
    Inventors: MD Hasnine, Matthew Essar, Walid Meliane
  • Patent number: 12512375
    Abstract: A system in package (SiP) with an air cavity is disclosed. In one aspect, a technique to bond a lid over the air cavity that reduces the risk of cavity integrity failure is provided. More specifically, a metal ring is provided that conforms to or is congruent to a shape of a lower lip of the lid. A dielectric material covers the metal ring, and a low modulus epoxy is used to bind the lower lip of the lid to the dielectric material. The lid and metal ring may have comparable thermal coefficients, which, when coupled with the low modulus epoxy, reduces chance of gross failure of the cavity.
    Type: Grant
    Filed: August 11, 2022
    Date of Patent: December 30, 2025
    Assignee: Qorvo US, Inc.
    Inventors: Md Hasnine, Jeffrey Miller, Yu Gary Gu, Neftali Salazar
  • Publication number: 20250391713
    Abstract: The present disclosure relates to a double-sided air-cavity package that includes a metalized laminate structure with a heat spreader, a perimeter structure protruding from a periphery of a bottom surface of the metalized laminate structure without covering the heat spreader, a lid positioned parallel to the metalized laminate structure and bonded to the perimeter structure, a first electronic component, and a second electronic component. Herein, a combination of the metalized laminate structure, the perimeter structure, and the lid delimits a closed air cavity. The first electronic component is attached to the bottom surface of the metalized laminate structure proximate to the heat spreader, positioned within the air cavity, and electrically connected to at least one interior conductive element within the perimeter structure. The second electronic component is attached to a top surface of the metalized laminate structure, positioned outside the air cavity, and does not reside over the heat spreader.
    Type: Application
    Filed: April 29, 2025
    Publication date: December 25, 2025
    Inventors: Peter Haase, MD Hasnine
  • Publication number: 20250336785
    Abstract: Double-sided high-power modules with air cavities are disclosed. In one aspect, a module may have a metallization layer having a high-power die on a first side and other components encased in mold material on a second side opposite the first side. Conductors are provided that couple metal conductors in the metallization layer through the mold to an external surface of the mold material such that the module may be electrically coupled to a substrate such as a printed circuit board or the like. By placing components on both sides of the metallization layer, the overall x-y dimensions of the module may be reduced.
    Type: Application
    Filed: March 18, 2025
    Publication date: October 30, 2025
    Inventors: Peter Haase, MD Hasnine
  • Publication number: 20250336753
    Abstract: An air cavity package and methods for making same are disclosed. In one aspect, a cavity is delimited by a metalized laminate structure and side walls with interior conductive elements. The metalized laminate structure has signal routing conductors that couple to the interior conductive elements of the side walls. The metalized laminate structure also has a heat sink structure. A die or component is placed on the heat sink structure and the cavity is closed by a lid. The interior conductive elements are exposed so that they may be configured to couple to a board or the like for integration into an electronic device.
    Type: Application
    Filed: March 19, 2025
    Publication date: October 30, 2025
    Inventors: Peter Haase, MD Hasnine
  • Publication number: 20250329603
    Abstract: The present disclosure relates to an air-cavity package including a base assembly with a package substrate and a flip-chip die attached to the package substrate, and a coined lid over the base assembly and including a lid body and a heat spreader. The lid body includes a lid base and a lid wall protruding from a periphery of the lid base towards the package substrate. The heat spreader extends through the lid base, protrudes from the lid base towards the package substrate, and is positioned over, aligned with, and thermally coupled to the flip-chip die. A lid sealing component seals the lid wall to the package substrate. Herein, a recess, which is defined underneath the lid base, surrounding the heat spreader, and surrounded by the lid wall, and a gap surrounding the flip-chip die combine to form a sealed air cavity. The flip-chip die is encapsulated within the air cavity.
    Type: Application
    Filed: February 12, 2025
    Publication date: October 23, 2025
    Inventors: MD Hasnine, Neftali Salazar
  • Publication number: 20250323113
    Abstract: One aspect of the present disclosure pertains to a chip module including an oversized heat spreader that supports thermal cooling of an integrated circuit (IC) die. The chip module includes a substrate, the IC die attached to the substrate, and a heat spreader coupled to a backside of the IC die. In some embodiments, the IC die has a first surface area, and the heat spreader has a second surface area that is at least twice as large as the first surface area.
    Type: Application
    Filed: March 28, 2025
    Publication date: October 16, 2025
    Inventors: Md Hasnine, Neftali Salazar
  • Patent number: 12421574
    Abstract: A lead-free solder alloy may comprise tin, silver, copper, bismuth, cobalt, titanium, and antimony. The alloy may further comprise antimony, nickel, or both. The silver may be present in an amount from about 3.1% to 3.8% by weight of the solder. The copper may be present in an amount from about 0.5% to 0.8% by weight of the solder. The bismuth may be present in an amount from about 0.0% (or 1.5%) to about 3.2% by weight of the solder. The cobalt may be present in an amount from about 0.03% to about 1.0% (or 0.05%) by weight of the solder. The titanium may be present in an amount from about 0.005% to about 0.02% by weight of the solder. The antimony may be present in an amount between about 1.0% to about 3.0% by weight of the solder. The balance of the solder is tin.
    Type: Grant
    Filed: June 29, 2023
    Date of Patent: September 23, 2025
    Assignee: ALPHA ASSEMBLY SOLUTIONS INC.
    Inventors: Md Hasnine, Lik Wai Kho