Patents by Inventor Md. Mohiuddin MAZUMDER

Md. Mohiuddin MAZUMDER has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11632130
    Abstract: An identification is made that a link is to exit an active state, the link comprising a plurality of lanes. Parity information is maintained for the lanes based on data previously sent over the link, and an indication of the parity information is sent prior to the exit from the active state.
    Type: Grant
    Filed: February 25, 2022
    Date of Patent: April 18, 2023
    Assignee: Intel Corporation
    Inventors: Zuoguo Wu, Debendra Das Sharma, Md. Mohiuddin Mazumder, Subas Bastola, Kai Xiao
  • Publication number: 20220255559
    Abstract: An identification is made that a link is to exit an active state, the link comprising a plurality of lanes. Parity information is maintained for the lanes based on data previously sent over the link, and an indication of the parity information is sent prior to the exit from the active state.
    Type: Application
    Filed: February 25, 2022
    Publication date: August 11, 2022
    Applicant: Intel Corporation
    Inventors: Zuoguo Wu, Debendra Das Sharma, Md. Mohiuddin Mazumder, Subas Bastola, Kai Xiao
  • Patent number: 11283466
    Abstract: An identification is made that a link is to exit an active state, the link comprising a plurality of lanes. Parity information is maintained for the lanes based on data previously sent over the link, and an indication of the parity information is sent prior to the exit from the active state.
    Type: Grant
    Filed: September 6, 2019
    Date of Patent: March 22, 2022
    Assignee: Intel Corporation
    Inventors: Zuoguo Wu, Debendra Das Sharma, Md. Mohiuddin Mazumder, Subas Bastola, Kai Xiao
  • Patent number: 11043965
    Abstract: An identification is made that a link is to exit an active state, the link comprising a plurality of lanes. Parity information is maintained for the lanes based on data previously sent over the link, and an indication of the parity information is sent prior to the exit from the active state.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: June 22, 2021
    Assignee: Intel Corporation
    Inventors: Zuoguo Wu, Debendra Das Sharma, Md. Mohiuddin Mazumder, Subas Bastola, Kai Xiao
  • Publication number: 20200067526
    Abstract: An identification is made that a link is to exit an active state, the link comprising a plurality of lanes. Parity information is maintained for the lanes based on data previously sent over the link, and an indication of the parity information is sent prior to the exit from the active state.
    Type: Application
    Filed: September 6, 2019
    Publication date: February 27, 2020
    Applicant: Intel Corporation
    Inventors: Zuoguo Wu, Debendra Das Sharma, Md. Mohiuddin Mazumder, Subas Bastola, Kai Xiao
  • Publication number: 20180191374
    Abstract: An identification is made that a link is to exit an active state, the link comprising a plurality of lanes. Parity information is maintained for the lanes based on data previously sent over the link, and an indication of the parity information is sent prior to the exit from the active state.
    Type: Application
    Filed: December 22, 2017
    Publication date: July 5, 2018
    Applicant: Intel Corporation
    Inventors: Zuoguo Wu, Debendra Das Sharma, Md. Mohiuddin Mazumder, Subas Bastola, Kai Xiao
  • Patent number: 9935063
    Abstract: Integrated circuit (IC) chip “on-die” inductor structures (systems and methods for their manufacture) may improve signaling from a data signal circuit to a surface contact of the chip. Such inductor structures may include a first data signal inductor having (1) a second end electrically coupled to an electrostatic discharge (ESD) circuit and a capacitance value of that circuit, and (2) a first end electrically coupled to a the data signal surface contact and to a capacitance value at that contact; and a second data signal inductor having (1) a second end electrically coupled to the data signal circuit and a capacitance value of that circuit, (2) a first end electrically coupled to the second end of the first data signal inductor, and to the capacitance value of the ESD circuit. Inductor values of the first and second inductors may be selected to cancel out the capacitance values to improve signaling.
    Type: Grant
    Filed: July 1, 2016
    Date of Patent: April 3, 2018
    Assignee: Intel Corporation
    Inventors: Yu Amos Zhang, Jihwan Kim, Ajay Balankutty, Anupriya Sriramulu, MD. Mohiuddin Mazumder, Frank O'Mahony, Zuoguo Wu, Kemal Aygun
  • Publication number: 20180005965
    Abstract: Integrated circuit (IC) chip “on-die” inductor structures (systems and methods for their manufacture) may improve signaling from a data signal circuit to a surface contact of the chip. Such inductor structures may include a first data signal inductor having (1) a second end electrically coupled to an electrostatic discharge (ESD) circuit and a capacitance value of that circuit, and (2) a first end electrically coupled to a the data signal surface contact and to a capacitance value at that contact; and a second data signal inductor having (1) a second end electrically coupled to the data signal circuit and a capacitance value of that circuit, (2) a first end electrically coupled to the second end of the first data signal inductor, and to the capacitance value of the ESD circuit. Inductor values of the first and second inductors may be selected to cancel out the capacitance values to improve signaling.
    Type: Application
    Filed: July 1, 2016
    Publication date: January 4, 2018
    Inventors: Yu Amos ZHANG, Jihwan KIM, Ajay BALANKUTTY, Anupriya SRIRAMULU, MD. Mohiuddin MAZUMDER, Frank O'MAHONY, Zuoguo WU, Kemal AYGUN
  • Publication number: 20170163286
    Abstract: An identification is made that a link is to exit an active state, the link comprising a plurality of lanes. Parity information is maintained for the lanes based on data previously sent over the link, and an indication of the parity information is sent prior to the exit from the active state.
    Type: Application
    Filed: December 26, 2013
    Publication date: June 8, 2017
    Inventors: Zuoguo WU, Debendra DAS SHARMA, Md. Mohiuddin MAZUMDER, Subas BASTOLA, Kai XIAO