Abstract: An apparatus includes a first jaw (16) and a second jaw (618, 718, 900) that cooperate to clamp and staple tissue (90). The second jaw includes a jaw body (620, 720, 902) and a distal tip (619, 719, 906) pivotable relative to the jaw body between a first discrete and a second discrete position. First and second openings (663, 784, 785, 932, 934) are both defined by one of the distal tip or a structure (621, 920) located proximal to the distal tip. A projection (637, 781, 918) is defined by the other of the distal tip or the structure. The projection is positionable within the first opening (663, 785, 932) to releasably retain the distal tip in the first discrete position, and within the second opening (663, 784, 934) to releasably retain the distal tip in the second discrete position.

Abstract: An integrated circuit device comprises multiple cores each comprising one or more separate input and output interfaces, the multiple cores integrated within the integrated circuit device to function as a single computer system. Internal inter-chip connection links are disposed on the integrated circuit device for connecting one or more cores with at least one other core via the one or more separate input and output interfaces. One or more bidirectional access ports are communicatively connected in each path of the inter-chip connection links to enable a separate external access point to each of the one or more separate input and output interfaces of the cores, wherein each of the one or more bidirectional access ports is dynamically selectable as each of an external input interface of the integrated circuit device and an external output interface of the integrated circuit device.

Abstract: An order controller stores each received event in a separate entry in one of at least two queues with a separate counter value set from an arrival order counter at the time of storage, wherein the arrival order counter is incremented after storage of each of the received events and on overflow the arrival order counter wraps back to zero. The order controller calculates an exclusive OR value of a first top bit of a first counter for a first queue from among the at least two queues and a second top bit of a second counter for a second queue from among the at least two queues. The order controller compares the exclusive OR value with a comparator bit to determine whether a first counter value in the first counter was stored before a second counter value in the second counter.

Abstract: An integrated circuit device comprises multiple cores each comprising one or more separate input and output interfaces, the multiple cores integrated within the integrated circuit device to function as a single computer system. Internal inter-chip connection links are disposed on the integrated circuit device for connecting one or more cores with at least one other core via the one or more separate input and output interfaces. One or more bidirectional access ports are communicatively connected in each path of the inter-chip connection links to enable a separate external access point to each of the one or more separate input and output interfaces of the cores, wherein each of the one or more bidirectional access ports is dynamically selectable as each of an external input interface of the integrated circuit device and an external output interface of the integrated circuit device.

Abstract: An order controller stores each received event in a separate entry in one of at least two queues with a separate counter value set from an arrival order counter at the time of storage, wherein the arrival order counter is incremented after storage of each of the received events and on overflow the arrival order counter wraps back to zero. The order controller calculates an exclusive OR value of a first top bit of a first counter for a first queue from among the at least two queues and a second top bit of a second counter for a second queue from among the at least two queues.

Abstract: An order controller stores each received event in a separate entry in one of at least two queues with a separate counter value set from an arrival order counter at the time of storage, wherein the arrival order counter is incremented after storage of each of the received events and on overflow the arrival order counter wraps back to zero. The order controller calculates an exclusive OR value of a first top bit of a first counter for a first queue from among the at least two queues and a second top bit of a second counter for a second queue from among the at least two queues.