Abstract: An intermittent operation circuit provided with a charge/discharge means in which, when a central processing means stops the operation of an internal clock oscillating means, a charging is started after discharging stored charges, and provided with an interruption control means which starts the operations of the internal oscillating means and the central processing means when a charge level of the charge stored in the charge/discharge means is once lowered and then the charge level reaches or exceeds a predetermined value, thereby, when the central processing means is in the stop mode, the operation of the processing means can be restored, without operating the timer and the internal clock oscillating means, resulting in that the consuming power of the circuit system can be further reduced than in the prior art.