Patents by Inventor Megumi Jyousaka

Megumi Jyousaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8135487
    Abstract: A temperature setting method of the present invention includes the steps of: measuring states of an etching pattern within the substrate for a substrate for which a series of photolithography processing including thermal processing and an etching treatment thereafter have been finished; calculating temperature correction values for regions of a thermal processing plate from measurement result of the states of the etching pattern within the substrate using a function between correction amounts for the states of the etching pattern and the temperature correction values for the thermal processing plate; and setting the temperature for each of the regions of the thermal processing plate by each of the calculated temperature correction values.
    Type: Grant
    Filed: April 15, 2008
    Date of Patent: March 13, 2012
    Assignee: Tokyo Electron Limited
    Inventors: Megumi Jyousaka, Masahide Tadokoro, Yoshitaka Konishi, Shinichi Shinozuka, Kunie Ogata
  • Patent number: 7968825
    Abstract: A thermal plate of a heating unit is divided into a plurality of thermal plate regions, and a temperature can be set for each of the thermal plate regions. A temperature correction value for adjusting a temperature within the thermal plate can be set for each of the thermal plate regions of the thermal plate. The line widths within the substrate which has been subjected to a photolithography process are measured, and an in-plane tendency of the measured line widths is decomposed into a plurality of in-plane tendency components using a Zernike polynomial. From the calculated plurality of in-plane tendency components, in-plane tendency components improvable by changing the temperature correction values are extracted and added together to calculate an improvable in-plane tendency of the measured line widths within the substrate.
    Type: Grant
    Filed: October 29, 2007
    Date of Patent: June 28, 2011
    Assignee: Tokyo Electron Limited
    Inventors: Megumi Jyousaka, Shinichi Shinozuka, Kunie Ogata
  • Patent number: 7957828
    Abstract: In the present invention, the line widths within a substrate of an etching pattern are measured for a substrate for which photolithography processing and an etching treatment thereafter have been finished. The line width measurement results are converted into the line widths of a resist pattern using relational expressions which have been obtained in advance. From the converted line widths of the resist pattern, coefficients of a polynomial function indicating variations within the substrate are calculated. Next, a function between line width correction amounts for the resist pattern and temperature correction values is used to calculate temperature correction values for the regions of the thermal plate to bring the coefficients of the polynomial function close to zero. Based on each of the calculated temperature correction values, the temperature for each of the regions is set.
    Type: Grant
    Filed: April 9, 2008
    Date of Patent: June 7, 2011
    Assignee: Tokyo Electron Limited
    Inventors: Masahide Tadokoro, Megumi Jyousaka, Yoshitaka Konishi, Shinichi Shinozuka, Kunie Ogata
  • Patent number: 7910863
    Abstract: A thermal plate of a PEB unit is divided into a plurality of thermal plate regions, and a temperature is settable for each of the thermal plate regions. A temperature correction value for adjusting the temperature within the thermal plate is settable for each of the thermal plate regions of the thermal plate. The line widths within the substrate for which a photolithography process has been finished are measured. The in-plane tendency of the measured line widths is decomposed into a plurality of in-plane tendency components using a Zernike polynomial. Then, in-plane tendency components improvable by setting the temperature correction values are extracted from the calculated plurality of in-plane tendency components and added to calculate an improvable in-plane tendency in the measured line widths. Then, the improvable in-plane tendency is subtracted from the in-plane tendency Z of the current processing states to calculate an after-improvement in-plane tendency.
    Type: Grant
    Filed: September 20, 2007
    Date of Patent: March 22, 2011
    Assignee: Tokyo Electron Limited
    Inventors: Megumi Jyousaka, Hiroshi Tomita, Masahide Tadokoro
  • Patent number: 7902485
    Abstract: Temperature setting of a thermal plate is performed so that the line width of a resist pattern is uniformly formed within a wafer. The thermal plate of a PEB unit is divided into a plurality of thermal plate regions so that the temperature can be set for each of the thermal plate regions. A temperature correction value for adjusting the temperature within the wafer mounted on the thermal plate is set for each of the thermal plate regions of the thermal plate. The temperature correction value for each of the thermal plate regions of the thermal plate is set after calculation by a calculation model created from a correlation between a line width of the resist pattern formed by thermal processing on the thermal plate and the temperature correction value. The calculation model M calculates the temperature correction value to make the line width uniform within the wafer, based on a line width measured value of the resist pattern.
    Type: Grant
    Filed: February 8, 2006
    Date of Patent: March 8, 2011
    Assignee: Tokyo Electron Limited
    Inventors: Megumi Jyousaka, Hiroshi Tomita, Masahide Tadokoro
  • Patent number: 7897897
    Abstract: In the present invention, a thermal plate of a PEB unit is divided into a plurality of thermal plate regions, and a temperature is settable for each of the thermal plate regions. A temperature correction value for adjusting the temperature within the thermal plate is settable for each of the thermal plate regions of the thermal plate. The line widths within the substrate which has been subjected to the photolithography process are measured, and an improvement in-plane tendency Za improved by change of the temperature settings is subtracted from an in-plane tendency Z of the measured line widths within the substrate to calculate an in-plane tendency Zb of the line widths within the substrate after change of temperature settings. The improvement in-plane tendency Za is calculated using the following expression. Za=?1×?×MT (?: a resist heat sensitivity, M: a calculation model, and T: temperature correction values for thermal plate regions).
    Type: Grant
    Filed: November 2, 2007
    Date of Patent: March 1, 2011
    Assignee: Tokyo Electron Limited
    Inventors: Megumi Jyousaka, Yoshitaka Konishi
  • Patent number: 7897896
    Abstract: In the present invention, a thermal plate of a heating unit is divided into a plurality of thermal plate regions, and a temperature can be set for each of the thermal plate regions. A temperature correction value for adjusting a temperature within the thermal plate can be set for each of the thermal plate regions of the thermal plate. The line widths within the substrate which has been subjected to a photolithography process are measured, and, from an in-plane tendency of the measured line widths, an in-plane tendency improvable by temperature correction and an unimprovable in-plane tendency are calculated using a Zernike polynomial. An average remaining tendency of the improvable in-plane tendency after improvement obtained in advance is added to the unimprovable in-plane tendency to estimate an in-plane tendency of the line widths within the substrate after change of temperature setting.
    Type: Grant
    Filed: October 19, 2007
    Date of Patent: March 1, 2011
    Assignee: Tokyo Electron Limited
    Inventors: Megumi Jyousaka, Shinichi Shinozuka, Kunie Ogata
  • Patent number: 7715952
    Abstract: In the present invention, a thermal plate is divided into a plurality of thermal plate regions, and a temperature is settable for each of the thermal plate regions. A temperature correction value for adjusting the temperature within the thermal plate is settable for each of the thermal plate regions of the thermal plate. The line widths within the wafer for which the photolithography process has been finished are first measured, and Zernike coefficients of a Zernike polynomial indicating a plurality of in-plane tendency components are calculated from the measured values of the line widths within the wafer. Then, the temperature correction values for the regions of the thermal plate to bring the calculated Zernike coefficients close to 0 are calculated using a calculation model indicating a correlation between change amounts of the Zernike coefficients and the temperature correction values.
    Type: Grant
    Filed: September 20, 2007
    Date of Patent: May 11, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Megumi Jyousaka, Hiroshi Tomita, Masahide Tadokoro
  • Publication number: 20090078695
    Abstract: A thermal plate of a PEB unit is divided into a plurality of thermal plate regions, and a temperature is settable for each of the thermal plate regions. A temperature correction value for adjusting the temperature within the thermal plate is settable for each of the thermal plate regions of the thermal plate. The line widths within the substrate for which a photolithography process has been finished are measured. The in-plane tendency of the measured line widths is decomposed into a plurality of in-plane tendency components using a Zernike polynomial. Then, in-plane tendency components improvable by setting the temperature correction values are extracted from the calculated plurality of in-plane tendency components and added to calculate an improvable in-plane tendency in the measured line widths. Then, the improvable in-plane tendency is subtracted from the in-plane tendency Z of the current processing states to calculate an after-improvement in-plane tendency.
    Type: Application
    Filed: September 20, 2007
    Publication date: March 26, 2009
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Megumi Jyousaka, Hiroshi Tomita, Masahide Tadokoro
  • Publication number: 20090082911
    Abstract: In the present invention, a thermal plate is divided into a plurality of thermal plate regions, and a temperature is settable for each of the thermal plate regions. A temperature correction value for adjusting the temperature within the thermal plate is settable for each of the thermal plate regions of the thermal plate. The line widths within the wafer for which the photolithography process has been finished are first measured, and Zernike coefficients of a Zernike polynomial indicating a plurality of in-plane tendency components are calculated from the measured values of the line widths within the wafer. Then, the temperature correction values for the regions of the thermal plate to bring the calculated Zernike coefficients close to 0 are calculated using a calculation model indicating a correlation between change amounts of the Zernike coefficients and the temperature correction values.
    Type: Application
    Filed: September 20, 2007
    Publication date: March 26, 2009
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Megumi JYOUSAKA, Hiroshi Tomita, Masahide Tadokoro
  • Publication number: 20090008381
    Abstract: Temperature setting of a thermal plate is performed so that the line width of a resist pattern is uniformly formed within a wafer. The thermal plate of a PEB unit is divided into a plurality of thermal plate regions so that the temperature can be set for each of the thermal plate regions. A temperature correction value for adjusting the temperature within the wafer mounted on the thermal plate is set for each of the thermal plate regions of the thermal plate. The temperature correction value for each of the thermal plate regions of the thermal plate is set after calculation by a calculation model created from a correlation between a line width of the resist pattern formed by thermal processing on the thermal plate and the temperature correction value. The calculation model M calculates the temperature correction value to make the line width uniform within the wafer, based on a line width measured value of the resist pattern.
    Type: Application
    Filed: February 8, 2006
    Publication date: January 8, 2009
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Megumi Jyousaka, Hiroshi Tomita, Masahide Tadokoro
  • Publication number: 20080257495
    Abstract: In the present invention, the line widths within a substrate of an etching pattern are measured for a substrate for which photolithography processing and an etching treatment thereafter have been finished. The line width measurement results are converted into the line widths of a resist pattern using relational expressions which have been obtained in advance. From the converted line widths of the resist pattern, coefficients of a polynomial function indicating variations within the substrate are calculated. Next, a function between line width correction amounts for the resist pattern and temperature correction values is used to calculate temperature correction values for the regions of the thermal plate to bring the coefficients of the polynomial function close to zero. Based on each of the calculated temperature correction values, the temperature for each of the regions is set.
    Type: Application
    Filed: April 9, 2008
    Publication date: October 23, 2008
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Masahide Tadokoro, Megumi Jyousaka, Yoshitaka Konishi, Shinichi Shinozuka, Kunie Ogata
  • Publication number: 20080257496
    Abstract: A temperature setting method of the present invention includes the steps of: measuring states of an etching pattern within the substrate for a substrate for which a series of photolithography processing including thermal processing and an etching treatment thereafter have been finished; calculating temperature correction values for regions of a thermal processing plate from measurement result of the states of the etching pattern within the substrate using a function between correction amounts for the states of the etching pattern and the temperature correction values for the thermal processing plate; and setting the temperature for each of the regions of the thermal processing plate by each of the calculated temperature correction values.
    Type: Application
    Filed: April 15, 2008
    Publication date: October 23, 2008
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Megumi JYOUSAKA, Masahide Tadokoro, Yoshitaka Konishi, Shinichi Shinozuka, Kunie Ogata
  • Publication number: 20080142508
    Abstract: In the present invention, a thermal plate of a heating unit is divided into a plurality of thermal plate regions, and a temperature can be set for each of the thermal plate regions. A temperature correction value for adjusting a temperature within the thermal plate can be set for each of the thermal plate regions of the thermal plate. The line widths within the substrate which has been subjected to a photolithography process are measured, and, from an in-plane tendency of the measured line widths, an in-plane tendency improvable by temperature correction and an unimprovable in-plane tendency are calculated using a Zernike polynomial. An average remaining tendency of the improvable in-plane tendency after improvement obtained in advance is added to the unimprovable in-plane tendency to estimate an in-plane tendency of the line widths within the substrate after change of temperature setting.
    Type: Application
    Filed: October 19, 2007
    Publication date: June 19, 2008
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Megumi JYOUSAKA, Shinichi SHINOZUKA, Kunie OGATA
  • Publication number: 20080116195
    Abstract: In the present invention, a thermal plate of a PEB unit is divided into a plurality of thermal plate regions, and a temperature is settable for each of the thermal plate regions. A temperature correction value for adjusting the temperature within the thermal plate is settable for each of the thermal plate regions of the thermal plate. The line widths within the substrate which has been subjected to the photolithography process are measured, and an improvement in-plane tendency Za improved by change of the temperature settings is subtracted from an in-plane tendency Z of the measured line widths within the substrate to calculate an in-plane tendency Zb of the line widths within the substrate after change of temperature settings. The improvement in-plane tendency Za is calculated using the following expression.
    Type: Application
    Filed: November 2, 2007
    Publication date: May 22, 2008
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Megumi Jyousaka, Yoshitaka Konishi
  • Publication number: 20080105669
    Abstract: A thermal plate of a heating unit is divided into a plurality of thermal plate regions, and a temperature can be set for each of the thermal plate regions. A temperature correction value for adjusting a temperature within the thermal plate can be set for each of the thermal plate regions of the thermal plate. The line widths within the substrate which has been subjected to a photolithography process are measured, and an in-plane tendency of the measured line widths is decomposed into a plurality of in-plane tendency components using a Zernike polynomial. From the calculated plurality of in-plane tendency components, in-plane tendency components improvable by changing the temperature correction values are extracted and added together to calculate an improvable in-plane tendency of the measured line widths within the substrate.
    Type: Application
    Filed: October 29, 2007
    Publication date: May 8, 2008
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Megumi JYOUSAKA, Shinichi Shinozuka, Kunie Ogata