Patents by Inventor Megumi Shibata

Megumi Shibata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10748915
    Abstract: According to one embodiment, there is provided a memory device which includes a plurality of elements that include three-dimensionally arranged memory cells, a transistor that is electrically connected to at least one of the plurality of elements, an inspection pad that is connected in series to at least one of the plurality of elements through the transistor, and a wiring that is electrically connected to the inspection pad and a gate of the transistor and capable of supplying a common potential to both the inspection pad and the transistor for turning the transistor to an OFF state.
    Type: Grant
    Filed: March 1, 2018
    Date of Patent: August 18, 2020
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Kazuhiro Nojima, Megumi Shibata, Tomonori Kajino, Taro Shiokawa
  • Publication number: 20190081053
    Abstract: According to one embodiment, there is provided a memory device which includes a plurality of elements that include three-dimensionally arranged memory cells, a transistor that is electrically connected to at least one of the plurality of elements, an inspection pad that is connected in series to at least one of the plurality of elements through the transistor, and a wiring that is electrically connected to the inspection pad and a gate of the transistor and capable of supplying a common potential to both the inspection pad and the transistor for turning the transistor to an OFF state.
    Type: Application
    Filed: March 1, 2018
    Publication date: March 14, 2019
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Kazuhiro NOJIMA, Megumi SHIBATA, Tomonori KAJINO, Taro SHIOKAWA
  • Patent number: 7421201
    Abstract: A method of determining a transmission route for optical signals in an optical signal transmission system comprising a transmitter for optical signals, a receiver for the optical signals, and repeaters for repeating the optical signals transmitted from the transmitter to the receiver, and having transmission routes between the transmitter and the receiver, wherein the numbers of the wavelength components of the optical signals that has been in-use in each section defined to each of the transmission routes, the acquired numbers of wavelength components are compared among the transmission routes, and one of the transmission routes having the minimum number of wavelength components is determined as the transmission route used to set the line.
    Type: Grant
    Filed: September 30, 2005
    Date of Patent: September 2, 2008
    Assignee: Fujitsu Limited
    Inventors: Megumi Shibata, Hiroyuki Iwaki, Hisanori Okano
  • Publication number: 20060018665
    Abstract: A method of determining a transmission route for optical signals in an optical signal transmission system comprising a transmitter for optical signals, a receiver for the optical signals, and repeaters for repeating the optical signals transmitted from the transmitter to the receiver, and having transmission routes between the transmitter and the receiver, wherein the numbers of the wavelength components of the optical signals that has been in-use in each section defined to each of the transmission routes, the acquired numbers of wavelength components are compared among the transmission routes, and one of the transmission routes having the minimum number of wavelength components is determined as the transmission route used to set the line.
    Type: Application
    Filed: September 30, 2005
    Publication date: January 26, 2006
    Applicant: FUJITSU LIMITED
    Inventors: Megumi Shibata, Hiroyuki Iwaki, Hisanori Okano
  • Publication number: 20050213967
    Abstract: If wavelengths ?a and ?b are dropped in NE (Network Equipment) 2 and a wavelength ?c is made Through, and all of wavelengths are made Through in NE3 in a certain time period, a route from NE1 to NE2, a route from NE2 to NE4, and a route from NE1 to NE4 are established. If a user who uses the wavelength ?a from NE1 to NE2, and a user who uses the wavelength ?b from NE2 to NE4 do not use the routes in another time period, and if another user desires to use a route from NE1 to NE3 and a route from NE3 to NE4, the routes are reestablished in a way such that the wavelength ?a is converted into the wavelength ?b and made Through in NE2, and the wavelength ?b is dropped and added in NE3.
    Type: Application
    Filed: August 11, 2004
    Publication date: September 29, 2005
    Applicant: FUJITSU LIMITED
    Inventors: Hisanori Okano, Hiroyuki Iwaki, Takanori Yasui, Masato Hashizume, Megumi Shibata
  • Publication number: 20040208567
    Abstract: An optical wavelength division multiplexing transmission system is disclosed, in which it is possible to establish a new additional line readily, without affecting lines. The optical wavelength division multiplexing transmission system has a plurality of cascaded transmission devices respectively having optical wavelength division multiplexing functions, and each of the plurality of transmission devices includes a management section for managing used and unused wavelengths, and the respective transmission devices located in a section where a new additional line is to be established allocate an unused wavelength to the new additional line, on the basis of the unused wavelength information held by the management sections, thereby ensuring a route going to the target transmission device.
    Type: Application
    Filed: April 19, 2002
    Publication date: October 21, 2004
    Applicant: FUJITSU LIMITED
    Inventors: Hisanori Okano, Hiroyuki Iwaki, Chikashi Hashimoto, Tatsuhiko Son, Seiji Matsuzaki, Megumi Shibata
  • Patent number: 6400614
    Abstract: A transmission device and an integrated circuit improved in quality and reliability of digital transmission control. A memory stores an input signal, write address generating means generates a write address for writing in the memory, and read address generating means generates a read address for reading from the memory. Phase state monitoring means monitors a transition from a steady phase state in which writing/reading in/from the memory is normally performed or from a startup state to a coincident phase state in which address values of the write and read addresses coincide with each other or to an unstable phase state in which a phase fluctuation margin is one-sided. When the coincident phase state or the unstable phase state is detected, reset signal output means outputs a reset signal to the write and read address generating means such that the phase relation between the write and read addresses is brought to an optimum phase relation.
    Type: Grant
    Filed: July 11, 2001
    Date of Patent: June 4, 2002
    Assignee: Fujitsu Limited
    Inventors: Masaki Hiromori, Seiji Matsuzaki, Toshiaki Asai, Yoshinari Oshio, Masato Hashizume, Megumi Shibata, Yuji Kamura
  • Patent number: 6374309
    Abstract: A communication signal suppressing apparatus capable of reducing a load of a firmware using portion is provided in a communication signal apparatus such as a common line signal apparatus. A common line signal processing circuit corresponds to hardware used to execute a portion of the level-2 process operation, and this common line signal processing circuit owns such a function capable of discarding a reception frame having no meaning other than a confirmation response, and also capable of extracting a reverse-direction sequence number thereof. As a result, the common line signal processing circuit performs a remaining level-2 process operation. Thus, since a workload of a processing apparatus (CPU) using the firmware can be reduced, this firmware can be designed with sufficient capacities. Also, other process operations can be carried out by this CPU.
    Type: Grant
    Filed: November 2, 1998
    Date of Patent: April 16, 2002
    Assignee: Fujitsu Limited
    Inventors: Sumie Morita, Megumi Shibata, Hiroyoshi Yoda, Hitoshi Ouchi, Kenji Kazehaya
  • Patent number: 5455824
    Abstract: A message information terminating system in a switching center is connected to a plurality of remote stations by Derived Data Link interfaces and includes transmission lines connected to the same data terminal unit of the switching center, for transmitting message information containing various information such as subscriber information with communication data by framing bits between the switching center and each of said remote stations, and a message terminating equipment provided with a processing unit for analyzing the message information and disposed in a network at the switching center. The data terminal unit collects the message information from a plurality of the remote stations and transmits the message information to the message terminating equipment through the network.
    Type: Grant
    Filed: October 5, 1993
    Date of Patent: October 3, 1995
    Assignee: Fujitsu Limited
    Inventors: Yuzo Okuyama, Satoshi Kakuma, Yasunori Tonooka, Megumi Shibata
  • Patent number: 5436159
    Abstract: The present invention provides a chimeric enzyme gene which codes for a monooxygenase having both monooxygenase activity derived from cytochrome P-450 and reducing power supplying ability derived from NADPH-cytochrome P-450 reductase.The present invention further provides a yeast expression plasmid which contains said chimeric enzyme gene and expresses said monooxygenase gene; a transformed yeast strain which carries said yeast expression plasmid; a monooxygenase which has both the monooxygenase activity and the reducing power supplying ability as mentioned above; and a process for producing said monooxygenase.
    Type: Grant
    Filed: December 9, 1993
    Date of Patent: July 25, 1995
    Assignee: Director-General of Agency of Industrial Science & Technology
    Inventors: Yoshiyasu Yabusaki, Hiroko Murakami, Toshiyuki Sakaki, Megumi Shibata, Hideo Ohkawa
  • Patent number: 5137822
    Abstract: Transformed yeasts with yeast expression plasmid containing yeast alcohol dehydrogenase promoter and bovine adrenocortical cytochrome P-450.sub.17.alpha. cDNA, which produce bovine adrenocortical cytochrome P-450.sub.17.alpha., and processes for producing 17-hydroxypregnenolone and 17-hydroxyprogesterone which comprises 17-hydroxylating pregnenolone or progesterone to 17-hydroxypregnenolone or 17-hydroxyprogesterone, respectively, with the said transformed yeasts.
    Type: Grant
    Filed: August 16, 1988
    Date of Patent: August 11, 1992
    Assignee: Director-General of Agency of Industrial Science & Technology an organ of The Ministry of Industrial Trade and Industry of Japan
    Inventors: Yoshiyasu Yabusaki, Toshiyuki Sakaki, Megumi Shibata, Hideo Ohkawa
  • Patent number: 5114852
    Abstract: The present invention provides a chimeric enzyme gene which codes for a monooxygenase having both monooxygenase activity derived from cytochrome P-450 and reducing power supplying ability derived from NADPH-cytochrome P-450 reductase.The present invention further provides a yeast expression plasmid which contains said chimeric enzyme gene and expresses said monooxygenase gene; a transformed yeast strain which carries said yeast expression plasmid; a monooxygenase which has both the monooxygenase activity and the reducing power supplying ability as mentioned above; and a process for producing said monooxygenase.
    Type: Grant
    Filed: March 27, 1990
    Date of Patent: May 19, 1992
    Assignee: Director-General of Agency of Industrial Science & Technology
    Inventors: Yoshiyasu Yabusaki, Hiroko Murakami, Toshiyuki Sakai, Megumi Shibata, Hideo Ohkawa