Patents by Inventor Megumu Kondo

Megumu Kondo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070037223
    Abstract: The present invention relates to a method for the analysis of differential expression of proteins employing a radioactive label, characterized by cleaving a tag from peptides labeled with a cICAT reagent, separating and purifying the resultant labeled peptides, and performing an analysis in mass spectrometry.
    Type: Application
    Filed: April 21, 2006
    Publication date: February 15, 2007
    Inventors: Isao KANEKO, Megumu Kondo, Atsushi Miyachi, Masayuki Yokota
  • Publication number: 20070015222
    Abstract: The present invention relates to a method for the analysis of differential expression of proteins employing a radioactive label, characterized by cleaving a tag from peptides labeled with a cICAT reagent, separating and purifying the resultant labeled peptides, and performing an analysis in mass spectrometry.
    Type: Application
    Filed: March 17, 2006
    Publication date: January 18, 2007
    Inventors: Isao Kaneko, Megumu Kondo, Atsushi Miyachi, Masayuki Yokota
  • Publication number: 20020026288
    Abstract: A chip, a genomic drug prescription support system, a chip information offering system, a chip supply system and a computer storage medium are provided for providing appropriate prescription support information concerning a genomic drug to be prescribed based on the genetic information of an individual. The chip 18 has probes 16 selectively disposed thereon for acquiring genetic information necessary for prescribing a genomic drug which is to be prescribed based in the genetic information of an individual.
    Type: Application
    Filed: August 3, 2001
    Publication date: February 28, 2002
    Inventors: Yoshikatsu Ueda, Kazuna Nozato, Megumu Kondo
  • Patent number: 5353411
    Abstract: In an operating system generation method for a computer, at a system initiation, a kernel as the basic portion of the operating system is linked with a plurality of input-output drivers controlling input-output devices. A directory name of each driver and an address thereof in a main memory are stored in a table within the kernel with a correspondence established therebetween, which allows mutual references between the kernel and the input-output drivers and which hence enables the input-output drivers to be generated in an independent fashion with respect to the kernel. As a result, the user can incorporate desired input-output drivers into an operating system depending on a hardware configuration of the computer system.
    Type: Grant
    Filed: September 28, 1992
    Date of Patent: October 4, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Yoshitake Nakaosa, Megumu Kondo
  • Patent number: 5280626
    Abstract: An emulator for use in a multi-process environment for simulating a computer and supporting testing of software, where the emulator detects a first event corresponding to a desired process on the basis of process information; detects a second event corresponding to a desired address on the basis of address information; stores in a memory the output of the first event and sets the output of the first event in the memory, when the desired process is being operated and resets the content in the memory, when a process, which is not desired, is being operated, such that the emulator can detect a final desired event on the basis of both the process information and the address information.
    Type: Grant
    Filed: May 10, 1991
    Date of Patent: January 18, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Megumu Kondo, Satoshi Masuda
  • Patent number: 5136709
    Abstract: In an operating system generation method of a computer, a symbolic name is converted into an identification code, which is further converted into an address. This enables an inter-reference operation to be achieved between a kernel and input/output device drivers, thereby independently generating the input/output device drivers and the kernel. As a result, depending on the hardware configuration of the user system, input/output device drivers can be incorporated into the operating system.
    Type: Grant
    Filed: December 7, 1988
    Date of Patent: August 4, 1992
    Assignees: Hitachi, Ltd., Hitachi Computer Engineering Co., Ltd.
    Inventors: Yoshihisa Shirakabe, Megumu Kondo, Yoshitake Nakaosa, Hidenori Yamada, Sadao Ohashi, Hideo Ohchi
  • Patent number: 5012405
    Abstract: In a file management system a plurality of information processing devices are provided with files of tree structure. The information processing devices are linked through a communication line and dispersed files are utilized by a plurality of users in common. Each of the users can construct his own file without having any influence on the others. A table is provided including a column indicating the relation of links for the case where an arbitrary branch of a tree structure, included within at least one information processing device, is linked with a part of files included within another information device and a column specifying groups, for which the relation of links is valid. Linking is only permitted for access demands from members belonging to the group for which the relation of links is indicated as valid, to the part of the files of the other information processing device.
    Type: Grant
    Filed: August 3, 1989
    Date of Patent: April 30, 1991
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Nishikado, Megumu Kondo, Kazuhiko Fukuoka, Fumiya Murata
  • Patent number: 4987531
    Abstract: In order to be able to arrange a series of files, which are in a reference relationship, on an arbitrary path, depending on the structure of the file system, a path specifying a particular file, which is in the reference relationship, is specified by a position relative to an object program file in a file system including a program, which is in course of execution, depending on the program, which is in course of execution.
    Type: Grant
    Filed: May 18, 1988
    Date of Patent: January 22, 1991
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Nishikado, Megumu Kondo, Fumiya Murata
  • Patent number: 4959770
    Abstract: In a data processing system having a central processing unit, at least an input/output unit such as an MT unit or a floppy disk unit, a memory, an address bus, a first address translation unit, a second address translation unit, and an address selection unit, an output address from the central processing unit is translated by the first address translation unit to supply a resultant address to the address bus and, an output address from the input/output unit is directly fed to the address bus. An address on the address bus is delivered to the address selection unit, and the address selection unit selectively supplies the memory with the output address delivered from the first translation unit onto the address bus or with the resultant address obtained by translating the output address from the input/output unit by means of the second translation unit.
    Type: Grant
    Filed: May 22, 1987
    Date of Patent: September 25, 1990
    Assignees: Hitachi Ltd., Hitachi Microcomputer Engineering
    Inventors: Megumu Kondo, Shuji Kamiya, Kazuhiko Fukuoka, Masatsugu Shinozaki, Hitoshi Sadamitsu