Abstract: An aim of this invention is to eliminate the risks of aggression “DPA of the n order” attacks, for all n values, of cryptography electronic assemblies or systems with a secret or private key. The process according to this invention concerns a securing process for an electronic system using a cryptographic calculation procedure using a secret key. The process consists of masking intermediate results in input or output of at least one critical function for the said procedure.

Abstract: The invention concerns an automatic method to secure an electronic calculation assembly against attacks by error introduction or by radiation. The following are used: 1) Static information generated by the automatic process; 2) A dynamic part of the memory of the electronic system allocated by the automatic process; 3) Beacons and check points to mark out the code, introduced by the automatic process; 4) Beacon functions storing information in the dynamic memory; 5) History verification functions using the static information and the dynamic memory to check that no errors have been introduced.

Abstract: The invention concerns a process for securing an electronic device incorporating a hardware component capable of autonomous implementation of calculation process f using one key K, the process involves calculating at least two new keys K?i such that at least one of said new keys is identical to key K, and one of said new keys is different from key K, and executing said calculation process f successively with each of said calculated keys K?i, using said hardware component.

Abstract: A system including storage comprising software code and a plurality of data structures. The system also includes processing logic coupled to the storage and adapted to execute the software code. If the processing logic executes a function call instruction, the processing logic stores copies of software code return information to a first data structure location and to a second data structure location. If, after executing a function associated with the function call instruction, the processing logic determines that data from the first and second data structure locations do not match, the processing logic initiates a security measure. The data is associated with the copies.

Abstract: The invention concerns a method to secure an electronic assembly implementing any algorithm against attacks by error introduction. The method according to the invention consists in performing an additional calculation using a verification function on at least one intermediate result in order to obtain a calculation signature and in performing a least once more all or part of the calculation in order to recalculate said signature and compare them in order to detect a possible error.

Abstract: A system is provided that includes a processor and a random access memory (RAM) coupled to the processor. The RAM is divided into public RAM and secure RAM. The system also includes a system memory coupled to the processor, wherein the system memory stores RAM resize instructions that, when executed, enable the public RAM and the secure RAM to be dynamically resized. The system memory may also store save/restore secure RAM instructions that, when executed, perform a save operation that saves the secure RAM to non-volatile memory and a restore operation that restores the secure RAM from the non-volatile memory. The system memory may also store arbitration instructions that, when executed, enable a cryptographic hardware accelerator (HWA) to be shared by a secure application and a public application.

Abstract: A secure demand paging system (1020) includes a processor (1030) operable for executing instructions, an internal memory (1034) for a first page in a first virtual machine context, an external memory (1024) for a second page in a second virtual machine context, and a security circuit (1038) coupled to the processor (1030) and to the internal memory (1034) for maintaining the first page secure in the internal memory (1034).

Abstract: The invention concerns an automatic method to secure an electronic calculation assembly against attacks by error introduction or by radiation. The following are used: 1) Static information generated by the automatic process; 2) A dynamic part of the memory of the electronic system allocated by the automatic process; 3) Beacons and check points to mark out the code, introduced by the automatic process; 4) Beacon functions storing information in the dynamic memory; 5) History verification functions using the static information and the dynamic memory to check that no errors have been introduced.

Abstract: The invention concerns a process for securing an electronic device incorporating a hardware component capable of autonomous implementation of calculation process f using one key K, the process involves calculating at least two new keys K?j such that at least one of said new keys is identical to key K, and one of said new keys is different from key K, and executing said calculation process f successively with each of said calculated keys K?j, using said hardware component.

Abstract: Perfected cryptographic protocol making it possible to counter attacks based on the analysis of the current consumption during the execution of a DES or similar.