Abstract: Techniques are disclosed for checkpointing data flow graph computation for machine learning. Processing elements within a reconfigurable fabric are configured to implement a data flow graph. Nodes of the data flow graph can include variable nodes. The processing elements are loaded with process agents. Valid data is executed by a first process agent. The first process agent corresponds to a starting node of the data flow graph. Invalid data is sent to the first process agent. The invalid data initiates a checkpoint operation for the data flow graph. Invalid data is propagated from the starting node of the data flow graph to other nodes within the data flow graph. The variable nodes are paused upon receiving invalid data. Paused variable nodes within the data flow graph are restarted by issuing a run command, and valid data is sent to the starting node of the data flow graph.

Abstract: Techniques are disclosed for dynamic reconfiguration using data transfer control. Clusters on a reconfigurable fabric are accessed to implement a logical operation. The logical operation can include a Boolean operation, a matrix operation, a tensor operation, etc. Clusters from the plurality of clusters are provisioned for implementation of a first agent on the reconfigurable fabric. The clusters can include quads. The one or more clusters provisioned for the first agent include a first data transfer control block. Additional clusters from the plurality of clusters are provisioned for implementation of a second agent on the reconfigurable fabric. The additional clusters provisioned for the second agent include a second data transfer control block. The logical operation is performed using the first agent. Control information is transferred from the first data transfer control block to the second data transfer control block.

Abstract: A computing device and method for managing security of a memory or storage device without the need for administer privileges. To access the secure memory, a host provides a data block containing a control command and authentication data to the memory device. The memory device includes a controller for controlling access to a secure memory in the memory device. The memory device identifies the control command in the data block, authenticates the control command bused on the authentication data, and executes the control command to allow the host device to access the secure memory.

Abstract: A computing device and method for managing security of a memory or storage device without the need for administer privileges. To access the secure memory, a host provides a data block containing a control command and authentication data to the memory device. The memory device includes a controller for controlling access to a secure memory in the memory device. The memory device identifies the control command in the data block, authenticates the control command based on the authentication data, and executes the control command to allow the host device to access the secure memory.

Abstract: A computing device and method for managing security of a memory or storage device without the need for administer privileges. To access the secure memory, a host provides a data block containing a control command and authentication data to the memory device. The memory device includes a controller for controlling access to a secure memory in the memory device. The memory device identifies the control command in the data block, authenticates the control command bused on the authentication data, and executes the control command to allow the host device to access the secure memory.

Abstract: A computing device and method for managing security of a memory or storage device without the need for administer privileges. To access the secure memory, a host provides a data block containing a control command and authentication data to the memory device. The memory device includes a controller for controlling access to a secure memory in the memory device. The memory device identifies the control command in the data block, authenticates the control command based on the authentication data, and executes the control command to allow the host device to access the secure memory.

Abstract: A computing device and method for managing security of a memory or storage device without the need for administer privileges. To access the secure memory, a host provides a data block containing a control command and authentication data to the memory device. The memory device includes a controller for controlling access to a secure memory in the memory device. The memory device identifies the control command in the data block, authenticates the control command based on the authentication data, and executes the control command to allow the host device to access the secure memory.

Abstract: At least a method and a system are described for monitoring and measuring one or more parameters in an integrated circuit chip by way of receiving a first voltage, a second voltage, and a control signal. In a representative embodiment, the first voltage is used for powering a probe and the second voltage is used as a voltage reference for voltage measurement within the integrated circuit chip. In one or more representative embodiments, the one or more parameters measured comprise minimum and maximum voltage levels of a signal, sampled voltage levels of a signal, a period of a signal, a duty cycle of a clock signal, a jitter of a clock signal, and/or a temperature at a location within the integrated circuit chip.

Abstract: A computing device and method for managing security of a memory or storage device without the need for administer privileges. To access the secure memory, a host provides a data block containing a control command and authentication data to the memory device. The memory device includes a controller for controlling access to a secure memory in the memory device. The memory device identifies the control command in the data block, authenticates the control command based on the authentication data, and executes the control command to allow the host device to access the secure memory.

Abstract: A method and apparatus for installing programs on a writeable storage device in a fault tolerant manner is described. A processor readable medium having instructions causes a processor to write at least one program to a writeable storage device. A state machine coupled to the processor readable medium indicates the write status of the program to the processor readable medium.