Abstract: A computer-implemented method of implementing a circuit design that includes an initial network within a programmable logic device can include generating a first choice network from the circuit design according to a first synthesis technique and determining a placement for the first choice network. At least a second choice network can be generated from the first choice network according to a second synthesis technique. A placement for the second choice network can be determined. The placement for the first choice network can be compared with the placement for the second choice network. A placement and corresponding choice network can be selected according to the comparison, and output.

Abstract: Methods of placing and routing a logic design are provided. The logic design includes logic elements and nets connecting the logic elements. A first placement and a partial routing of the logic elements and the nets of the logic design are generated. The partial routing leaves some of the nets unsuccessfully routed. An initial area associated with each of the logic elements is expanded for the logic elements that are connected to the unsuccessfully routed nets. Positions for the logic elements are determined from a linear system that reduces a total length of the nets connecting the logic elements and inhibits overlap of the areas of the logic elements. A second placement of the logic elements is generated from the positions. A complete routing of all of the nets is generated for the second placement. A specification of the second placement and the complete routing is output.