Patents by Inventor Mei Chou

Mei Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11948971
    Abstract: A method includes forming isolations extending into a semiconductor substrate, recessing the isolation regions, wherein a semiconductor region between the isolation regions forms a semiconductor fin, forming a first dielectric layer on the isolation regions and the semiconductor fin, forming a second dielectric layer over the first dielectric layer, planarizing the second dielectric layer and the first dielectric layer, and recessing the first dielectric layer. A portion of the second dielectric layer protrudes higher than remaining portions of the first dielectric layer to form a protruding dielectric fin. A portion of the semiconductor fin protrudes higher than the remaining portions of the first dielectric layer to form a protruding semiconductor fin. A portion of the protruding semiconductor fin is recessed to form a recess, from which an epitaxy semiconductor region is grown. The epitaxy semiconductor region expands laterally to contact a sidewall of the protruding dielectric fin.
    Type: Grant
    Filed: August 10, 2021
    Date of Patent: April 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jeng-Wei Yu, Tsz-Mei Kwok, Tsung-Hsi Yang, Li-Wei Chou, Ming-Hua Yu
  • Publication number: 20240075514
    Abstract: A rotary cable arranging tool is disclosed. The rotary cable arranging tool is used for untwisting a first and a second cable. The rotary cable arranging tool includes a first annular structure, a first and a second assembly member, and a first and a second hole. The first and the second holes are assembled by the cooperation of the first and the second assemblies so as to be pressed to change a width of an inner diameter. When the first and second cables are in a twisted state, the first and second assemblies are counter-rotated together, so that the first and the second cables are untwisted and enter the first and second holes respectively. Then the first and second holes are tightly combined with the first and second cables, and the first and the second cable are pulled out to be straightened.
    Type: Application
    Filed: February 3, 2023
    Publication date: March 7, 2024
    Inventors: Chien-Chou Liao, Mei-Fang Lin
  • Publication number: 20220310894
    Abstract: The disclosure provides a light emitting diode structure, including a substrate, a first semiconductor layer, a light emitting layer, a second semiconductor layer, a semiconductor contacting layer, a first conductive layer and a second conductive layer. The first semiconductor layer is disposed on the substrate. The first semiconductor includes a first thickness structure and a second thickness structure, in which the first thickness structure is thicker than the second thickness structure. The light emitting layer is disposed on the first thickness structure. The second semiconductor layer is disposed on the light emitting layer The semiconductor contacting layer is disposed on the second thickness structure, in which the vertical projections of the semiconductor contacting layer and the light emitting layer on the substrate don't overlap nor contact. A doping type of the semiconductor contacting layer is the same as the first semiconductor layer.
    Type: Application
    Filed: March 17, 2022
    Publication date: September 29, 2022
    Inventors: Hsin-Chuan WANG, Tzong-Liang TSAI, Hsiu-Mei CHOU, Chin-Hung LUO
  • Publication number: 20210257316
    Abstract: A method includes forming signal lines in a pair of neighboring metal layers of a semiconductor device, and forming first dummy conductive cells in an empty area without metal lines passing therethrough, between the pair of neighboring metal layers. At least two dummy conductive cells of the first dummy conductive cells that are separated from each other, and the at least two dummy conductive cells fully overlap one of the signal lines in plan view.
    Type: Application
    Filed: April 23, 2021
    Publication date: August 19, 2021
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wei-Yu MA, Hui-Mei CHOU, Kuo-Ji CHEN
  • Patent number: 10991663
    Abstract: A method is disclosed and includes forming a plurality of dummy conductive cells that provides different densities in empty areas in metal layers of a semiconductor device according to overlap conditions of the empty areas each arranged between a pair of neighboring metal layers of metal layers. Forming the plurality of dummy conductive cells includes operations of forming a group of dummy conductive cells in a single empty area of the empty areas when the single empty area in one pair of the neighboring metal layers is overlapped by a signal line in the same pair of the neighboring metal layers. When viewed in plan view, projection areas of the group of dummy conductive cells are vertically overlapped by a projection area of the signal line. A semiconductor device is also disclosed herein.
    Type: Grant
    Filed: December 13, 2019
    Date of Patent: April 27, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wei-Yu Ma, Hui-Mei Chou, Kuo-Ji Chen
  • Publication number: 20200118948
    Abstract: A method is disclosed and includes forming a plurality of dummy conductive cells that provides different densities in empty areas in metal layers of a semiconductor device according to overlap conditions of the empty areas each arranged between a pair of neighboring metal layers of metal layers. Forming the plurality of dummy conductive cells includes operations of forming a group of dummy conductive cells in a single empty area of the empty areas when the single empty area in one pair of the neighboring metal layers is overlapped by a signal line in the same pair of the neighboring metal layers. When viewed in plan view, projection areas of the group of dummy conductive cells are vertically overlapped by a projection area of the signal line. A semiconductor device is also disclosed herein.
    Type: Application
    Filed: December 13, 2019
    Publication date: April 16, 2020
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wei-Yu MA, Hui-Mei CHOU, Kuo-Ji CHEN
  • Patent number: 10510692
    Abstract: A semiconductor device includes metal layers, first dummy conductive cells, and groups of second dummy conductive cells. The metal layers include empty areas and are grouped into pairs of neighboring metal layers. The first dummy conductive cells are each formed in each of the empty areas in each of the pairs of neighboring metal layers that is overlapped by another empty area or a line in the same pair of neighboring metal layers. Each group of the second dummy conductive cells is formed in each of the empty areas in each of the pairs of neighboring metal layers that is overlapped by a signal line in the same pair of neighboring metal layer.
    Type: Grant
    Filed: July 26, 2018
    Date of Patent: December 17, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wei-Yu Ma, Hui-Mei Chou, Kuo-Ji Chen
  • Publication number: 20180337145
    Abstract: A semiconductor device includes metal layers, first dummy conductive cells, and groups of second dummy conductive cells. The metal layers include empty areas and are grouped into pairs of neighboring metal layers. The first dummy conductive cells are each formed in each of the empty areas in each of the pairs of neighboring metal layers that is overlapped by another empty area or a line in the same pair of neighboring metal layers. Each group of the second dummy conductive cells is formed in each of the empty areas in each of the pairs of neighboring metal layers that is overlapped by a signal line in the same pair of neighboring metal layer.
    Type: Application
    Filed: July 26, 2018
    Publication date: November 22, 2018
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wei-Yu Ma, Hui-Mei Chou, Kuo-Ji Chen
  • Patent number: 10043767
    Abstract: A method is disclosed that includes the operations outlined below. A plurality of dummy conductive cells that provide different densities are formed in a plurality of empty areas in a plurality of metal layers of a semiconductor device according to overlap conditions of the empty areas between each pair of neighboring metal layers.
    Type: Grant
    Filed: October 24, 2013
    Date of Patent: August 7, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
    Inventors: Wei-Yu Ma, Hui-Mei Chou, Kuo-Ji Chen
  • Patent number: 9892911
    Abstract: An epitaxial structure includes a substrate, a first epitaxial layer and a second epitaxial layer. The substrate has a surface, and the first epitaxial layer is disposed over the substrate and defines a plurality of slanting air voids tapering away from the substrate and an opening over each of the slanting air voids. The second epitaxial layer is disposed on the first epitaxial layer and collectively defines the slanting air voids in a shape of trapezoid with the first epitaxial layer.
    Type: Grant
    Filed: February 9, 2017
    Date of Patent: February 13, 2018
    Assignee: Lextar Electronics Corporation
    Inventors: Jun-Rong Chen, Hsiu-Mei Chou, Jhao-Cheng Ye
  • Patent number: 9673353
    Abstract: An epitaxial structure includes a substrate, a first epitaxial layer and a second epitaxial layer. The substrate has a surface, and the first epitaxial layer is disposed over the substrate and defines a plurality of slanting air voids tapering away from the substrate and an opening over each of the slanting air voids. The second epitaxial layer is disposed on the first epitaxial layer and collectively defines the slanting air voids in a shape of trapezoid with the surface and the first epitaxial layer.
    Type: Grant
    Filed: April 23, 2015
    Date of Patent: June 6, 2017
    Assignee: Lextar Electronics Corporation
    Inventors: Jun-Rong Chen, Hsiu-Mei Chou, Jhao-Cheng Ye
  • Publication number: 20170154769
    Abstract: An epitaxial structure includes a substrate, a first epitaxial layer and a second epitaxial layer. The substrate has a surface, and the first epitaxial layer is disposed over the substrate and defines a plurality of slanting air voids tapering away from the substrate and an opening over each of the slanting air voids. The second epitaxial layer is disposed on the first epitaxial layer and collectively defines the slanting air voids in a shape of trapezoid with the first epitaxial layer.
    Type: Application
    Filed: February 9, 2017
    Publication date: June 1, 2017
    Inventors: Jun-Rong CHEN, Hsiu-Mei CHOU, Jhao-Cheng YE
  • Publication number: 20170148951
    Abstract: An epitaxial structure includes a substrate, a first epitaxial layer and a second epitaxial layer. The substrate has a surface, and the first epitaxial layer is disposed over the substrate and defines a plurality of stepped air voids and an opening over each of the stepped air voids. The second epitaxial layer is disposed on the first epitaxial layer and collectively defines the stepped air voids with the first epitaxial layer.
    Type: Application
    Filed: February 8, 2017
    Publication date: May 25, 2017
    Inventors: Jun-Rong CHEN, Hsiu-Mei CHOU, Jhao-Cheng YE
  • Patent number: 9601661
    Abstract: An epitaxial structure includes a substrate, a first epitaxial layer and a second epitaxial layer. The substrate has a surface, and the first epitaxial layer is disposed over the substrate and defines a plurality of stepped air voids and an opening over each of the stepped air voids. The second epitaxial layer is disposed on the first epitaxial layer and collectively defines the stepped air voids with the surface and the first epitaxial layer.
    Type: Grant
    Filed: April 23, 2015
    Date of Patent: March 21, 2017
    Assignee: LEXTAR ELECTRONICS CORPORATION
    Inventors: Jun-Rong Chen, Hsiu-Mei Chou, Jhao-Cheng Ye
  • Patent number: 9572847
    Abstract: The invention discloses an herbal extract of treating lung tumor. The herbal extract comprises Antrodia cinnamomea and Cordyceps militaris, and the herbal extract is manufactured as following: mingling Antrodia cinnamomea and Cordyceps militaris with a weight ratio being between 1:5 and 5:1 to obtain a mixture; blending the mixture with a solvent with a weight-volume percentage being 50%, followed by extracting at 40-90° C. to obtain a herbal solution; and concentrating the herbal solution to obtain the herbal extract.
    Type: Grant
    Filed: December 23, 2013
    Date of Patent: February 21, 2017
    Assignee: Kingland Property Corporation, Ltd.
    Inventors: Wei-Cheng Chen, Mei-Chou Lai, Shorong-Shii Liou, I-Min Liu
  • Patent number: 9272010
    Abstract: The invention discloses an herbal extract of treating liver cancer, wherein a method of producing the herbal extract comprising the steps of: blending Antrodia cinnamomea, Rhinacanthus nasutus and Phellinus linteus and obtaining a mixture, wherein the weight percentages of Antrodia cinnamomea, Rhinacanthus nasutus and Phellinus linteus are 33.4 to 60%, 20 to 33.4% and 20 to 33.4% by weight of the mixture, respectively; soaking the mixture with a 95% ethanol solution with a weight-volume percentage being 50%, followed by extracting at 50 to 80° C.; and concentrating the extracted product to obtain the herbal extract. The invention also discloses a method of treating liver cancer.
    Type: Grant
    Filed: October 31, 2014
    Date of Patent: March 1, 2016
    Assignee: KINGLAND REAL ESTATE CO., LTD.
    Inventors: Wei-Cheng Chen, Mei-Chou Lai, Shorong-Shii Liou, I-Min Liu
  • Publication number: 20150366921
    Abstract: The invention discloses an herbal extract of treating liver cancer, wherein a method of producing the herbal extract comprising the steps of: blending Antrodia cinnamomea, Rhinacanthus nasutus and Phellinus linteus and obtaining a mixture, wherein the weight percentages of Antrodia cinnamomea, Rhinacanthus nasutus and Phellinus linteus are 33.4 to 60%, 20 to 33.4% and 20 to 33.4% by weight of the mixture, respectively; soaking the mixture with a 95% ethanol solution with a weight-volume percentage being 50%, followed by extracting at 50 to 80° C.; and concentrating the extracted product to obtain the herbal extract. The invention also discloses a method of treating liver cancer.
    Type: Application
    Filed: October 31, 2014
    Publication date: December 24, 2015
    Inventors: Wei-Cheng CHEN, Mei-Chou LAI, Shorong-Shii LIOU, I-Min LIU
  • Patent number: 9153736
    Abstract: The invention provides a light-emitting diode device and a method for fabricating the same. The light-emitting diode device includes a metal substrate. A light-emitting diode structure is bonded on the metal substrate. The light-emitting diode structure includes a first type semiconductor substrate and a second type semiconductor layer. The first type semiconductor layer has a first surface and a second surface opposite to the first surface. The second type semiconductor layer is in contact with the metal substrate. A light-emitting layer is disposed between the first type semiconductor substrate and the second type semiconductor layer. A portion of the second surface and a sidewall adjacent to the second surface are uneven roughened surfaces.
    Type: Grant
    Filed: June 6, 2014
    Date of Patent: October 6, 2015
    Assignee: Lextar Electronics Corporation
    Inventors: Hsiu-Mei Chou, Jui-Yi Chu, Cheng-Ta Kuo
  • Publication number: 20150228853
    Abstract: An epitaxial structure includes a substrate, a first epitaxial layer and a second epitaxial layer. The substrate has a surface, and the first epitaxial layer is disposed over the substrate and defines a plurality of slanting air voids tapering away from the substrate and an opening over each of the slanting air voids. The second epitaxial layer is disposed on the first epitaxial layer and collectively defines the slanting air voids in a shape of trapezoid with the surface and the first epitaxial layer.
    Type: Application
    Filed: April 23, 2015
    Publication date: August 13, 2015
    Inventors: Jun-Rong CHEN, Hsiu-Mei CHOU, Jhao-Cheng YE
  • Publication number: 20150228854
    Abstract: An epitaxial structure includes a substrate, a first epitaxial layer and a second epitaxial layer. The substrate has a surface, and the first epitaxial layer is disposed over the substrate and defines a plurality of stepped air voids and an opening over each of the stepped air voids. The second epitaxial layer is disposed on the first epitaxial layer and collectively defines the stepped air voids with the surface and the first epitaxial layer.
    Type: Application
    Filed: April 23, 2015
    Publication date: August 13, 2015
    Inventors: Jun-Rong CHEN, Hsiu-Mei CHOU, Jhao-Cheng YE