Abstract: A preamplifier has a pre-compensation circuit that optimizes the write current in a low current range of less than 30 mA. The pre-compensation circuit maintains the peak current with a high overshoot current amplitude for achieving an optimized areal density capability to equalize the erase widths for the bit lengths of the encoded data with bit lengths greater than three clock time periods with encoded data with a bit length of the two clock time period. Alternately, the pre-compensation circuit has an overshoot generator that determines the optimum amplitude of the overshoot current for the bit-lengths for the encoded data. An overshoot data synchronizer is connected to a read current preamplifier to receive a pseudorandom read data signal that is applied to the overshoot generator to enable the different overshoot current amplitude depending on the bit length of the encoded data. The pre-compensated data current is transferred to the write head.