Patents by Inventor Mei-Man L. Syu

Mei-Man L. Syu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10417123
    Abstract: Disclosed embodiments are directed to systems and methods for improving garbage collection and wear leveling performance in data storage systems. The embodiments can improve the efficiency of static wear leveling by picking the best candidate block for static wear leveling and/or postponing static wear leveling on certain candidate blocks. In one embodiment, one or more source blocks for a static wear leveling operation are selected based at least on whether the one or more blocks have a low P/E count and contain static data, such as data that has been garbage collected.
    Type: Grant
    Filed: September 16, 2013
    Date of Patent: September 17, 2019
    Assignee: Western Digital Technologies, Inc.
    Inventors: Kamyar Souri, Andrew J. Tomlin, Dmitry S. Obukhov, Jing Booth, Mei-Man L. Syu
  • Patent number: 10114744
    Abstract: Disclosed embodiments are directed to systems and methods for assigning and selecting memory units for internal memory operations in data storage systems. The embodiments can improve the efficiency of garbage collection operations by directing dynamic data into memory units with a relatively lower P/E count, directing static and system data into memory units with a relatively higher P/E count, and not mixing static and dynamic data by packing static data into separate memory units from dynamic data. In one embodiment, after completion of garbage collection of blocks, the blocks are each assigned to one of a cool down list and an available memory unit list based on a size limit of the cool down list and a number of program-erase (P/E) operations performed on each block. The blocks are subsequently selected from the lists for write operations according to whether write data includes static or dynamic data.
    Type: Grant
    Filed: April 24, 2017
    Date of Patent: October 30, 2018
    Assignee: Western Digital Technologies, Inc.
    Inventors: Kamyar Souri, Andrew J. Tomlin, Dmitry S. Obukhov, Jing Booth, Mei-Man L. Syu
  • Patent number: 10079048
    Abstract: A non-volatile semiconductor memory is disclosed comprising a first memory device and control circuitry operable to issue an access command to the first memory device. A command status is requested from the first memory device after a status delay. When the command status indicates the first memory device has completed the command, a first access time of the memory device is measured. An access sequence of the first memory device is then modified in response to the access time.
    Type: Grant
    Filed: March 24, 2009
    Date of Patent: September 18, 2018
    Assignee: Western Digital Technologies, Inc.
    Inventor: Mei-Man L. Syu
  • Patent number: 9875025
    Abstract: Systems and methods for retaining data are disclosed in which refresh copy operations are performed on data stored in non-volatile solid-state memory. A controller may be configured to maintain a list of physical memory locations, the list sorted by a least recently used criterion. The controller may select a first entry from a top of the list and perform a refresh operation to copy data stored in a current physical memory location associated with the first entry to a new physical memory location, and may remove the first entry from the top of the list and add a new entry associated with the new physical memory location to a bottom of the list. The controller may repeat the select, perform, remove and add steps for a plurality of entries in the list, and the steps may be timed such that all refresh operations are performed for all of the plurality of entries within a set period of time.
    Type: Grant
    Filed: September 14, 2015
    Date of Patent: January 23, 2018
    Assignee: Western Digital Technologies, Inc
    Inventors: Mei-Man L. Syu, Matthew Call, Ho-Fan Kang, Lan D. Phan
  • Publication number: 20170357571
    Abstract: Disclosed embodiments are directed to systems and methods for assigning and selecting memory units for internal memory operations in data storage systems. The embodiments can improve the efficiency of garbage collection operations by directing dynamic data into memory units with a relatively lower P/E count, directing static and system data into memory units with a relatively higher P/E count, and not mixing static and dynamic data by packing static data into separate memory units from dynamic data. In one embodiment, after completion of garbage collection of blocks, the blocks are each assigned to one of a cool down list and an available memory unit list based on a size limit of the cool down list and a number of program-erase (P/E) operations performed on each block. The blocks are subsequently selected from the lists for write operations according to whether write data includes static or dynamic data.
    Type: Application
    Filed: April 24, 2017
    Publication date: December 14, 2017
    Inventors: Kamyar SOURI, Andrew J. Tomlin, Dmitry S. Obukhov, Jing Booth, Mei-Man L. Syu
  • Patent number: 9652379
    Abstract: Embodiments of the invention are directed to enabling concurrent commands from command requesters in a non-volatile solid-state storage subsystem in a manner that reduces contentions among the commands. Embodiments group blocks of memory into multiple sets of superblocks and associate a command requester to each superblock set. In one embodiment, the superblock sets are dynamically associated with a requester. In one embodiment, the superblock sets are dynamically associated with requesters based in part on at least one of internal memory management needs and host command throughput. In one embodiment, an erase command is executed on a superblock within a set and a simultaneous write command is executed on a superblock within another set.
    Type: Grant
    Filed: April 30, 2014
    Date of Patent: May 16, 2017
    Assignee: Western Digital Technologies, Inc.
    Inventors: Mei-Man L. Syu, Matthew Call, Ho-Fan Kang, Lan D. Phan
  • Patent number: 9632926
    Abstract: Disclosed embodiments are directed to systems and methods for assigning and selecting memory units for internal memory operations in data storage systems. The embodiments can improve the efficiency of garbage collection operations by directing dynamic data into memory units with a relatively lower P/E count, directing static and system data into memory units with a relatively higher P/E count, and not mixing static and dynamic data by packing static data into separate memory units from dynamic data. In one embodiment, after completion of garbage collection of blocks, the blocks are each assigned to one of a cool down list and an available memory unit list based on a size limit of the cool down list and a number of program-erase (P/E) operations performed on each block. The blocks are subsequently selected from the lists for write operations according to whether write data includes static or dynamic data.
    Type: Grant
    Filed: September 16, 2013
    Date of Patent: April 25, 2017
    Assignee: Western Digital Technologies, Inc.
    Inventors: Kamyar Souri, Andrew J. Tomlin, Dmitry S. Obukhov, Jing Booth, Mei-Man L. Syu
  • Patent number: 9595347
    Abstract: Systems and methods for data retention manager in a solid state storage system utilizing temperature measurement mechanisms are disclosed. Background data scanning can provide an efficient way to monitor data health and can be used to determine whether data refreshing is needed or to prevent data retention from degrading beyond error correction capabilities. In certain embodiments, data scanning may be performed as a background process regularly, for example, every month. However, effects of temperature on data retention may not be adequately accounted for using such methods. Certain embodiments disclosed herein provide a numerical integral method for taking account the system temperature by using the acceleration factor for data retention. Embodiments disclosed herein may provide for accurate handling of data retention in view of complex device temperature history.
    Type: Grant
    Filed: October 6, 2015
    Date of Patent: March 14, 2017
    Assignee: Western Digital Technologies, Inc.
    Inventors: Dengtao Zhao, Yongke Sun, Haibo Li, Kroum S. Stoev, Mei-Man L. Syu
  • Patent number: 9405617
    Abstract: Systems and methods are disclosed for recovering from a data access error encountered in data stripes implemented in a data redundancy scheme (e.g., RAID) in a solid state storage device. In one embodiment, the storage device holds parity data in a temporary, volatile memory such as a RAM and writes the parity data to the non-volatile memory when a full stripe's worth of new write data has been written to the non-volatile memory. In one embodiment, upon detecting that a data access error has occurred in a partially written stripe, the storage device initiates a write of the parity data for the partially written stripe to the non-volatile memory and executes a RAID recovery procedure using the newly written parity data to attempt to recover from the detected error. This approach allows for a recovery from the data access error without waiting for the full stripe to be written.
    Type: Grant
    Filed: March 17, 2014
    Date of Patent: August 2, 2016
    Assignee: Western Digital Technologies, Inc.
    Inventor: Mei-Man L. Syu
  • Patent number: 9348741
    Abstract: Embodiments of the invention are directed to systems and methods for optimizing handling of data access requests. In one embodiment, a data storage device including non-volatile memory and magnetic media includes a controller that defers writing data to the magnetic media by first writing to the non-volatile memory and reporting to the host a write complete status. However, in cases where the non-volatile memory includes Multi-Level Cell (MLC) memory, if the write data is to be written to an upper page of an MLC cell, a backup power source such as a capacitor may be needed to avoid the paired page corruption problem. Embodiments of the invention avoid the problem without the use of a backup power source by writing deferred write data to a portion of the MLC memory that is operating in Single-Level Cell (SLC) mode, i.e., only the lower pages of the memory cells are written.
    Type: Grant
    Filed: December 19, 2011
    Date of Patent: May 24, 2016
    Assignee: Western Digital Technologies, Inc.
    Inventors: Mei-Man L. Syu, Robert L. Horn, William B. Boyle
  • Publication number: 20160027523
    Abstract: Systems and methods for data retention manager in a solid state storage system utilizing temperature measurement mechanisms are disclosed. Background data scanning can provide an efficient way to monitor data health and can be used to determine whether data refreshing is needed or to prevent data retention from degrading beyond error correction capabilities. In certain embodiments, data scanning may be performed as a background process regularly, for example, every month. However, effects of temperature on data retention may not be adequately accounted for using such methods. Certain embodiments disclosed herein provide a numerical integral method for taking account the system temperature by using the acceleration factor for data retention. Embodiments disclosed herein may provide for accurate handling of data retention in view of complex device temperature history.
    Type: Application
    Filed: October 6, 2015
    Publication date: January 28, 2016
    Inventors: Dengtao Zhao, Yongke Sun, Haibo Li, Kroum S. Stoev, Mei-Man L. Syu
  • Publication number: 20160004446
    Abstract: Systems and methods for retaining data in non-volatile solid-state memory are disclosed in which refresh copy operations are performed on data stored in non-volatile solid-state memory. A controller may be configured to issue copy commands and to maintain usage data on a storage subsystem. A refresh copy operation helps ensure that data written to memory retain integrity by causing data to be programmed again onto the memory, which minimizes the risk of data error caused by electron leak in the non-volatile solid-state memory. The controller may be configured to maintain a list of physical memory locations storing data in non-volatile solid-state memory array, where the list is sorted by a least recently used criterion. In one embodiment, the controller may select a first entry from a top of the list for processing and issue a copy command stored in a current physical memory location associated with the first entry to a new physical memory location.
    Type: Application
    Filed: September 14, 2015
    Publication date: January 7, 2016
    Inventors: Mei-Man L. SYU, Matthew CALL, Ho-Fan KANG, Lan D. PHAN
  • Patent number: 9165668
    Abstract: Systems and methods for data retention manager in a solid state storage system utilizing temperature measurement mechanisms are disclosed. Background data scanning can provide an efficient way to monitor data health and can be used to determine whether data refreshing is needed or to prevent data retention from degrading beyond error correction capabilities. In certain embodiments, data scanning may be performed as a background process regularly, for example, every month. However, effects of temperature on data retention may not be adequately accounted for using such methods. Certain embodiments disclosed herein provide a numerical integral method for taking account the system temperature by using the acceleration factor for data retention. Embodiments disclosed herein may provide for accurate handling of data retention in view of complex device temperature history.
    Type: Grant
    Filed: September 13, 2013
    Date of Patent: October 20, 2015
    Assignee: Western Digital Technologies, Inc.
    Inventors: Dengtao Zhao, Yongke Sun, Haibo Li, Kroum S. Stoev, Mei-Man L. Syu
  • Patent number: 9146875
    Abstract: A hybrid drive is disclosed comprising a head actuated over a disk comprising a plurality of data tracks, and a non-volatile semiconductor memory (NVSM) comprising a plurality of memory segments. When a life remaining of the NVSM falls below a threshold, the NVSM is marked as read only. When a write command is received from a host including write data, and when the NVSM is marked as read only, the write data is written to the disk and a corresponding memory segment in the NVSM is invalidated.
    Type: Grant
    Filed: May 11, 2011
    Date of Patent: September 29, 2015
    Assignee: Western Digital Technologies, Inc.
    Inventors: William B. Boyle, Mei-Man L. Syu, William C. Cain
  • Patent number: 9135166
    Abstract: Systems and methods for retaining data in non-volatile solid-state memory are disclosed in which refresh copy operations are performed on data stored in non-volatile solid-state memory. A controller can comprise a data retention module configured to issue copy commands within different periods of time and to maintain usage data on a storage subsystem. A refresh copy operation helps ensure that data written to memory retain integrity by causing data to be programmed again onto the memory. Execution of refresh copy commands may be prioritized over other commands based on a remaining length of time. One or more data structures may be used to determine memory blocks that require refresh copy operations. In one embodiment, a validity bit array is used to track blocks that contain valid data. In another embodiment, a least recently used list is used to track blocks that have been least recently written.
    Type: Grant
    Filed: November 22, 2013
    Date of Patent: September 15, 2015
    Assignee: Western Digital Technologies, Inc.
    Inventors: Mei-Man L. Syu, Matthew Call, Ho-Fan Kang, Lan D. Phan
  • Patent number: 9110835
    Abstract: In one embodiment of the invention, a flash-based/solid-state storage system with an implemented data redundancy scheme such as RAID is configured to hold parity data in a volatile memory such as RAM and write such parity data to the non-volatile flash media when a full stripe of data has been written to the media. Other embodiments in certain situations force an early write of the parity for a partial stripe that has not been fully written to the non-volatile media. Those situations may include a data access error on data in a partial stripe and a detected power loss event with a partial stripe present. Embodiments are directed to writing additional data with the parity data for the partial stripe and then later using the additional data in data recovery. This approach allows the controller to easily detect the presence of a partial stripe and handle such a stripe accordingly.
    Type: Grant
    Filed: March 17, 2014
    Date of Patent: August 18, 2015
    Assignee: Western Digital Technologies, Inc.
    Inventors: Matthew Call, John A. Morrison, Lan D. Phan, Mei-Man L. Syu
  • Patent number: 9058280
    Abstract: A hybrid drive is disclosed comprising a head actuated over a disk comprising a plurality of data tracks, and a non-volatile semiconductor memory (NVSM). An access command is received from a host, the access command identifying at least one target logical block address (LBA). When the target LBA is mapped to a target data track on the disk, the head is positioned over the target data track and an accumulated access time is updated for the target LBA. The accumulated access time is compared to a first threshold, and the target LBA is migrated to the NVSM in response to the comparison.
    Type: Grant
    Filed: May 11, 2011
    Date of Patent: June 16, 2015
    Assignee: Western Digital Technologies, Inc.
    Inventors: William B. Boyle, Mei-Man L. Syu, Virgil V. Wilkins
  • Patent number: 9026893
    Abstract: A data storage device is disclosed comprising non-volatile solid-state array comprising M storage elements for storing data protected by Reed-Solomon (R-S) code, each storage element comprising multiple blocks, each block comprising multiple pages for storing data. The data storage device further comprises a controller in communication with the storage array and defining a superblock comprising logical grouping of M blocks, each located in different storage element, and multiple superpages in each superblock, each superpage comprising M pages, each located in a different storage element. The controller generates, for each superpage, at least one R-S code parity page for protecting data pages in the superpage, where number of data pages and the at least one parity page is equal to M?1. The controller assigns one page in each superpage as an inactive page not used in the R-S code, where at least two inactive pages are in different storage elements.
    Type: Grant
    Filed: December 13, 2012
    Date of Patent: May 5, 2015
    Assignee: Western Digital Technologies, Inc.
    Inventors: Mei-Man L. Syu, Cliff Pajaro
  • Patent number: 9003224
    Abstract: A data storage system configured to manage unreliable memory units is disclosed. In one embodiment, the data storage system maintains an unreliable memory unit list designating memory units in a non-volatile memory array as reliable or unreliable. The unreliable memory unit list facilitates management of unreliable memory at a granularity level finer than the granularity of a block of memory. The data storage system can add entries to the unreliable memory unit list as unreliable memory units are discovered. Further, the data storage system can continue to perform memory access operations directed to reliable memory units in blocks containing other memory units determined to be unreliable. As a result, the operational life of the data storage system is extended.
    Type: Grant
    Filed: April 25, 2012
    Date of Patent: April 7, 2015
    Assignee: Western Digital Technologies, Inc.
    Inventors: Jing Booth, Mei-Man L. Syu
  • Patent number: 8966343
    Abstract: A solid-state storage retention monitor determines whether user data in a solid-state device is in need of a scrubbing operation. One or more reference blocks may be programmed with a known data pattern, wherein the reference block(s) experiences substantially similar P/E cycling, storage temperature, storage time, and other conditions as the user blocks. The reference blocks may therefore effectively represent data retention properties of the user blocks and provide information regarding whether/when a data refreshing operation is needed.
    Type: Grant
    Filed: August 21, 2012
    Date of Patent: February 24, 2015
    Assignee: Western Digital Technologies, Inc.
    Inventors: Mei-Man L. Syu, Jui-Yao Yang, Dengtao Zhao