Patents by Inventor Mei-Yee Shek

Mei-Yee Shek has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11881411
    Abstract: The present disclosure provides methods for performing an annealing process on a metal containing layer in TFT display applications, semiconductor or memory applications. In one example, a method of forming a metal containing layer on a substrate includes supplying an oxygen containing gas mixture on a substrate in a processing chamber, the substrate comprising a metal containing layer disposed on an optically transparent substrate, maintaining the oxygen containing gas mixture in the processing chamber at a process pressure between about 2 bar and about 50 bar, and thermally annealing the metal containing layer in the presence of the oxygen containing gas mixture.
    Type: Grant
    Filed: May 4, 2021
    Date of Patent: January 23, 2024
    Assignee: Applied Materials, Inc.
    Inventors: Kaushal K. Singh, Mei-Yee Shek, Srinivas D. Nemani, Ellie Y. Yieh
  • Publication number: 20230187276
    Abstract: Embodiments herein provide for oxygen based treatment of low-k dielectric layers deposited using a flowable chemical vapor deposition (FCVD) process. Oxygen based treatment of the FCVD deposited low-k dielectric layers desirably increases the Ebd to capacitance and reliability of the devices while removing voids.
    Type: Application
    Filed: February 10, 2023
    Publication date: June 15, 2023
    Inventors: Shi YOU, He REN, Naomi YOSHIDA, Nikolaos BEKIARIS, Mehul NAIK, Jay Martin SEAMONS, Jingmei LIANG, Mei-Yee SHEK
  • Patent number: 11615984
    Abstract: Embodiments herein provide for oxygen based treatment of low-k dielectric layers deposited using a flowable chemical vapor deposition (FCVD) process. Oxygen based treatment of the FCVD deposited low-k dielectric layers desirably increases the Ebd to capacitance and reliability of the devices while removing voids.
    Type: Grant
    Filed: April 14, 2020
    Date of Patent: March 28, 2023
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Shi You, He Ren, Naomi Yoshida, Nikolaos Bekiaris, Mehul Naik, Martin Jay Seamons, Jingmei Liang, Mei-Yee Shek
  • Publication number: 20230066497
    Abstract: Methods for plasma enhanced chemical vapor deposition (PECVD) of silicon carbonitride films are described. A flowable silicon carbonitride film is formed on a substrate surface by exposing the substrate surface to a precursor and a reactant, the precursor having a structure of general formula (I) or general formula (II) wherein R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, and R12 are independently selected from hydrogen (H), substituted or unsubstituted alkyl, substituted or unsubstituted alkoxy, substituted or unsubstituted vinyl, silane, substituted or unsubstituted amine, or halide; purging the processing chamber of the silicon precursor, and then exposing the substrate to an ammonia plasma.
    Type: Application
    Filed: November 1, 2022
    Publication date: March 2, 2023
    Applicant: Applied Materials, Inc.
    Inventors: Mei-Yee Shek, Bhargav S. Citla, Joshua Rubnitz, Jethro Tannos, Chentsau Chris Ying, Srinivas D. Nemani, Ellie Y. Yieh
  • Patent number: 11581183
    Abstract: Embodiments described herein provide for post deposition anneal of a substrate, having an amorphous carbon layer deposited thereon, to desirably reduce variations in local stresses thereacross. In one embodiment, a method of processing a substrate includes positioning a substrate, having an amorphous carbon layer deposited thereon, in a first processing volume, flowing an anneal gas into the first processing volume, heating the substrate to an anneal temperature of not more than about 450° C., and maintaining the substrate at the anneal temperature for about 30 seconds or more. Herein, the amorphous carbon layer was deposited on the substrate using a method which included positioning the substrate on a substrate support disposed in a second processing volume, flowing a processing gas into the second processing volume, applying pulsed DC power to a carbon target disposed in the second processing volume, forming a plasma of the processing gas, and depositing the amorphous carbon layer on the substrate.
    Type: Grant
    Filed: March 4, 2021
    Date of Patent: February 14, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Bhargav S. Citla, Mei-Yee Shek, Srinivas D. Nemani
  • Patent number: 11566325
    Abstract: Methods for plasma enhanced chemical vapor deposition (PECVD) of silicon carbonitride films are described. A flowable silicon carbonitride film is formed on a substrate surface by exposing the substrate surface to a precursor and a reactant, the precursor having a structure of general formula (I) or general formula (II) wherein R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, and R12 are independently selected from hydrogen (H), substituted or unsubstituted alkyl, substituted or unsubstituted alkoxy, substituted or unsubstituted vinyl, silane, substituted or unsubstituted amine, or halide; purging the processing chamber of the silicon precursor, and then exposing the substrate to an ammonia plasma.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: January 31, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Mei-Yee Shek, Bhargav S. Citla, Joshua Rubnitz, Jethro Tannos, Chentsau Chris Ying, Srinivas D. Nemani, Ellie Y. Yieh
  • Publication number: 20210317580
    Abstract: Embodiments herein provide for oxygen based treatment of low-k dielectric layers deposited using a flowable chemical vapor deposition (FCVD) process. Oxygen based treatment of the FCVD deposited low-k dielectric layers desirably increases the Ebd to capacitance and reliability of the devices while removing voids.
    Type: Application
    Filed: April 14, 2020
    Publication date: October 14, 2021
    Inventors: Shi YOU, He REN, Naomi YOSHIDA, Nikolaos BEKIARIS, Mehul NAIK, Martin Jay SEAMONS, Jingmei LIANG, Mei-Yee SHEK
  • Publication number: 20210257221
    Abstract: The present disclosure provides methods for performing an annealing process on a metal containing layer in TFT display applications, semiconductor or memory applications. In one example, a method of forming a metal containing layer on a substrate includes supplying an oxygen containing gas mixture on a substrate in a processing chamber, the substrate comprising a metal containing layer disposed on an optically transparent substrate, maintaining the oxygen containing gas mixture in the processing chamber at a process pressure between about 2 bar and about 50 bar, and thermally annealing the metal containing layer in the presence of the oxygen containing gas mixture.
    Type: Application
    Filed: May 4, 2021
    Publication date: August 19, 2021
    Inventors: Kaushal K. SINGH, Mei-Yee SHEK, Srinivas D. NEMANI, Ellie Y. YIEH
  • Publication number: 20210189555
    Abstract: Methods for plasma enhanced chemical vapor deposition (PECVD) of silicon carbonitride films are described. A flowable silicon carbonitride film is formed on a substrate surface by exposing the substrate surface to a precursor and a reactant, the precursor having a structure of general formula (I) or general formula (II) wherein R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, and R12 are independently selected from hydrogen (H), substituted or unsubstituted alkyl, substituted or unsubstituted alkoxy, substituted or unsubstituted vinyl, silane, substituted or unsubstituted amine, or halide; purging the processing chamber of the silicon precursor, and then exposing the substrate to an ammonia plasma.
    Type: Application
    Filed: December 14, 2020
    Publication date: June 24, 2021
    Applicant: Applied Materials, Inc.
    Inventors: Mei-Yee Shek, Bhargav S. Citla, Joshua Rubnitz, Jethro Tannos, Chentsau Chris Ying, Srinivas D. Nemani, Ellie Y. Yieh
  • Publication number: 20210193461
    Abstract: Embodiments described herein provide for post deposition anneal of a substrate, having an amorphous carbon layer deposited thereon, to desirably reduce variations in local stresses thereacross. In one embodiment, a method of processing a substrate includes positioning a substrate, having an amorphous carbon layer deposited thereon, in a first processing volume, flowing an anneal gas into the first processing volume, heating the substrate to an anneal temperature of not more than about 450° C., and maintaining the substrate at the anneal temperature for about 30 seconds or more. Herein, the amorphous carbon layer was deposited on the substrate using a method which included positioning the substrate on a substrate support disposed in a second processing volume, flowing a processing gas into the second processing volume, applying pulsed DC power to a carbon target disposed in the second processing volume, forming a plasma of the processing gas, and depositing the amorphous carbon layer on the substrate.
    Type: Application
    Filed: March 4, 2021
    Publication date: June 24, 2021
    Inventors: Bhargav S. CITLA, Mei-Yee SHEK, Srinivas D. NEMANI
  • Patent number: 10998200
    Abstract: The present disclosure provides methods for performing an annealing process on a metal containing layer in TFT display applications, semiconductor or memory applications. In one example, a method of forming a metal containing layer on a substrate includes supplying an oxygen containing gas mixture on a substrate in a processing chamber, the substrate comprising a metal containing layer disposed on an optically transparent substrate, maintaining the oxygen containing gas mixture in the processing chamber at a process pressure between about 2 bar and about 50 bar, and thermally annealing the metal containing layer in the presence of the oxygen containing gas mixture.
    Type: Grant
    Filed: January 30, 2019
    Date of Patent: May 4, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Kaushal K. Singh, Mei-Yee Shek, Srinivas D. Nemani, Ellie Y. Yieh
  • Patent number: 10950429
    Abstract: Embodiments described herein provide for post deposition anneal of a substrate, having an amorphous carbon layer deposited thereon, to desirably reduce variations in local stresses thereacross. In one embodiment, a method of processing a substrate includes positioning a substrate, having an amorphous carbon layer deposited thereon, in a first processing volume, flowing an anneal gas into the first processing volume, heating the substrate to an anneal temperature of not more than about 450° C., and maintaining the substrate at the anneal temperature for about 30 seconds or more. Herein, the amorphous carbon layer was deposited on the substrate using a method which included positioning the substrate on a substrate support disposed in a second processing volume, flowing a processing gas into the second processing volume, applying pulsed DC power to a carbon target disposed in the second processing volume, forming a plasma of the processing gas, and depositing the amorphous carbon layer on the substrate.
    Type: Grant
    Filed: April 26, 2019
    Date of Patent: March 16, 2021
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Bhargav S. Citla, Mei-Yee Shek, Srinivas D. Nemani
  • Patent number: 10916433
    Abstract: Methods for forming low resistivity metal silicide interconnects using one or a combination of a physical vapor deposition (PVD) process and an anneal process are described herein. In one embodiment, a method of forming a plurality of wire interconnects includes flowing a sputtering gas into a processing volume of a processing chamber, applying a power to a target disposed in the processing volume, forming a plasma in a region proximate to the sputtering surface of the target, and depositing the metal and silicon layer on the surface of the substrate. Herein, the first target comprises a metal silicon alloy and a sputtering surface thereof is angled with respect to a surface of the substrate at between about 10° and about 50°.
    Type: Grant
    Filed: March 27, 2019
    Date of Patent: February 9, 2021
    Assignee: APPLIED MATERIALS, INC.
    Inventors: He Ren, Maximillian Clemons, Mei-Yee Shek, Minrui Yu, Bencherki Mebarki, Mehul B. Naik, Chentsau Ying, Srinivas D. Nemani
  • Patent number: 10714331
    Abstract: A method for forming a thermally stable spacer layer is disclosed. The method includes first disposing a substrate in an internal volume of a processing chamber. The substrate has a film formed thereon, the film including silicon, carbon, nitrogen, and hydrogen. Next, high pressure steam is introduced into the processing chamber. The film is exposed to the high pressure steam to convert the film to reacted film, the reacted film including silicon, carbon, oxygen, and hydrogen.
    Type: Grant
    Filed: March 15, 2019
    Date of Patent: July 14, 2020
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Mihaela Balseanu, Srinivas D. Nemani, Mei-Yee Shek, Ellie Y. Yieh
  • Publication number: 20190348283
    Abstract: Embodiments described herein provide for post deposition anneal of a substrate, having an amorphous carbon layer deposited thereon, to desirably reduce variations in local stresses thereacross. In one embodiment, a method of processing a substrate includes positioning a substrate, having an amorphous carbon layer deposited thereon, in a first processing volume, flowing an anneal gas into the first processing volume, heating the substrate to an anneal temperature of not more than about 450° C., and maintaining the substrate at the anneal temperature for about 30 seconds or more. Herein, the amorphous carbon layer was deposited on the substrate using a method which included positioning the substrate on a substrate support disposed in a second processing volume, flowing a processing gas into the second processing volume, applying pulsed DC power to a carbon target disposed in the second processing volume, forming a plasma of the processing gas, and depositing the amorphous carbon layer on the substrate.
    Type: Application
    Filed: April 26, 2019
    Publication date: November 14, 2019
    Inventors: Bhargav S. CITLA, Mei-Yee SHEK, Srinivas D. NEMANI
  • Publication number: 20190311908
    Abstract: Methods for forming low resistivity metal silicide interconnects using one or a combination of a physical vapor deposition (PVD) process and an anneal process are described herein. In one embodiment, a method of forming a plurality of wire interconnects includes flowing a sputtering gas into a processing volume of a processing chamber, applying a power to a target disposed in the processing volume, forming a plasma in a region proximate to the sputtering surface of the target, and depositing the metal and silicon layer on the surface of the substrate. Herein, the first target comprises a metal silicon alloy and a sputtering surface thereof is angled with respect to a surface of the substrate at between about 10° and about 50°.
    Type: Application
    Filed: March 27, 2019
    Publication date: October 10, 2019
    Inventors: He REN, Maximillian CLEMONS, Mei-Yee SHEK, Minrui YU, Bencherki MEBARKI, Mehul B. NAIK, Chentsau YING, Srinivas D. NEMANI
  • Publication number: 20190311896
    Abstract: A method for forming a thermally stable spacer layer is disclosed. The method includes first disposing a substrate in an internal volume of a processing chamber. The substrate has a film formed thereon, the film including silicon, carbon, nitrogen, and hydrogen. Next, high pressure steam is introduced into the processing chamber. The film is exposed to the high pressure steam to convert the film to reacted film, the reacted film including silicon, carbon, oxygen, and hydrogen.
    Type: Application
    Filed: March 15, 2019
    Publication date: October 10, 2019
    Inventors: Mihaela BALSEANU, Srinivas D. NEMANI, Mei-Yee SHEK, Ellie Y. YIEH
  • Publication number: 20190279879
    Abstract: The present disclosure provides methods for performing an annealing process on a metal containing layer in TFT display applications, semiconductor or memory applications. In one example, a method of forming a metal containing layer on a substrate includes supplying an oxygen containing gas mixture on a substrate in a processing chamber, the substrate comprising a metal containing layer disposed on an optically transparent substrate, maintaining the oxygen containing gas mixture in the processing chamber at a process pressure between about 2 bar and about 50 bar, and thermally annealing the metal containing layer in the presence of the oxygen containing gas mixture.
    Type: Application
    Filed: January 30, 2019
    Publication date: September 12, 2019
    Inventors: Kaushal K. SINGH, Mei-Yee SHEK, Srinivas D. NEMANI, Ellie Y. YIEH
  • Publication number: 20190258153
    Abstract: The present disclosure provides methods for forming a material layer in a film stack for manufacturing a photomask in EUV applications and phase shift and binary photomask applications. In one example, a method for forming a dielectric material on a substrate includes supplying an oxygen containing gas mixture on a substrate in a processing chamber, the substrate comprising a dielectric material disposed on an optically transparent silicon containing material, maintaining the oxygen containing gas mixture in the processing chamber at a process pressure at greater than 2 bar, and thermally treating the dielectric material in the presence of the oxygen containing gas mixture.
    Type: Application
    Filed: January 30, 2019
    Publication date: August 22, 2019
    Inventors: Srinivas D. NEMANI, Ellie Y. YIEH, Mei-Yee SHEK
  • Patent number: 10008448
    Abstract: An interconnect structure for use in semiconductor devices and a method for fabricating the same is described. The method includes positioning a substrate in a vacuum processing chamber, wherein the substrate comprises a copper layer having an exposed surface and a low-k dielectric layer having an exposed surface, forming a metal layer over the exposed surface of the copper layer, wherein the exposed surface of the low-k dielectric layer is free from the metal layer, and forming a metal-based dielectric layer over the metal layer and over at least part of the exposed low-k dielectric surface, wherein the metal-based dielectric layer comprises an aluminum compound.
    Type: Grant
    Filed: February 22, 2017
    Date of Patent: June 26, 2018
    Assignee: Applied Materials, Inc.
    Inventors: He Ren, Mehul B. Naik, Yong Cao, Mei-yee Shek