Abstract: A method for determining lower radius limit of movable throat of shale is provided, and it includes: performing a low-temperature nitrogen adsorption test on a target shale to obtain first pore radii; performing a high-pressure mercury injection test on the target shale to obtain second pore radii; performing a nuclear magnetic resonance test on the target shale to obtain third pore radii; obtaining a relationship diagram of distribution frequencies and pore radii according to three pore radii; distinguishing, according to the pore radii, relationship diagram data, and performing normalization processing to determining a relationship curve of normalized frequency data and the pore radii; and determining a lower radius limit of movable throat of shale according to relationship curve. A problem of describing characteristics of shale occurrence space with complex pore structures and strong heterogeneity is solved, the method is suitable for determining lower radius limit of movable throat of shale.

Abstract: A method for determining lower radius limit of movable throat of shale is provided, and it includes: performing a low-temperature nitrogen adsorption test on a target shale to obtain first pore radii; performing a high-pressure mercury injection test on the target shale to obtain second pore radii; performing a nuclear magnetic resonance test on the target shale to obtain third pore radii; obtaining a relationship diagram of distribution frequencies and pore radii according to three pore radii; distinguishing, according to the pore radii, relationship diagram data, and performing normalization processing to determining a relationship curve of normalized frequency data and the pore radii; and determining a lower radius limit of movable throat of shale according to relationship curve. A problem of describing characteristics of shale occurrence space with complex pore structures and strong heterogeneity is solved, the method is suitable for determining lower radius limit of movable throat of shale.

Abstract: An array substrate comprises data lines, gate lines, thin film transistors and pixel electrodes formed on a base substrate. Pixel units are defined by intersecting the data lines and the gate lines, the thin film transistors are formed at the intersections of the data lines and the gate lines, and the data lines extend across each of the pixel units in the middle of the pixel units. At least two thin film transistors for controlling a same pixel electrode are respectively formed on both sides of the data line in each pixel unit.

Abstract: An array substrate comprises data lines, gate lines, thin film transistors and pixel electrodes formed on a base substrate. Pixel units are defined by intersecting the data lines and the gate lines, the thin film transistors are formed at the intersections of the data lines and the gate lines, and the data lines extend across each of the pixel units in the middle of the pixel units. At least two thin film transistors for controlling a same pixel electrode are respectively formed on both sides of the data line in each pixel unit.

Abstract: An array substrate comprises data lines, gate lines, thin film transistors and pixel electrodes formed on a base substrate. Pixel units are defined by intersecting the data lines and the gate lines, the thin film transistors are formed at the intersections of the data lines and the gate lines, and the data lines extend across each of the pixel units in the middle of the pixel units. At least two thin film transistors for controlling a same pixel electrode are respectively formed on both sides of the data line in each pixel unit.

Abstract: An array substrate comprises data lines, gate lines, thin film transistors and pixel electrodes formed on a base substrate. Pixel units are defined by intersecting the data lines and the gate lines, the thin film transistors are formed at the intersections of the data lines and the gate lines, and the data lines extend across each of the pixel units in the middle of the pixel units. At least two thin film transistors for controlling a same pixel electrode are respectively formed on both sides of the data line in each pixel unit.