Patents by Inventor Meirav O. Nitzan

Meirav O. Nitzan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Interconnect circuitry fault detection
    Patent number: 9672094
    Abstract: Fault detection for an interconnect bus includes performing safety register validation including validating correct operation of a safety register in a slave circuit. The safety register is reserved for validation operations. Write bus validation is performed where, over an address range of the slave circuit, received write addresses within the address range are stored in the safety register of the slave circuit and read back by a master circuit for validation. Read bus validation is performed where, over the address range of the slave circuit, received read addresses within the address range are provided back to the master circuit for validation.
    Type: Grant
    Filed: October 24, 2014
    Date of Patent: June 6, 2017
    Assignee: XILINX, INC.
    Inventors: Meirav O. Nitzan, Edmond Jordan
  • Generation of a random sub-space of the space of assignments for a set of generative attributes for verification coverage closure
    Patent number: 9582458
    Abstract: System, method and computer readable medium are described. The method may include obtaining user defined distribution traits characterizing a random sub-space of a space of assignments for a set of generative variables. The method may further include applying the user defined distribution traits on the space of assignments for a set of generative variables to generate the random sub-space of the space of assignments for a set of generative variables. The method may also include testing a device under test using the generated random sub-space of the space of assignments for a set of generative variables.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: February 28, 2017
    Assignee: CADENCE DESIGN SYSTEMS, INC.
    Inventors: Efrat Gavish, Yael Kinderman, Meirav O. Nitzan
  • GENERATION OF A RANDOM SUB-SPACE OF THE SPACE OF ASSIGNMENTS FOR A SET OF GENERATIVE ATTRIBUTES FOR VERIFICATION COVERAGE CLOSURE
    Publication number: 20140172347
    Abstract: System, method and computer readable medium are described. The method may include obtaining user defined distribution traits characterizing a random sub-space of a space of assignments for a set of generative variables. The method may further include applying the user defined distribution traits on the space of assignments for a set of generative variables to generate the random sub-space of the space of assignments for a set of generative variables. The method may also include testing a device under test using the generated random sub-space of the space of assignments for a set of generative variables.
    Type: Application
    Filed: December 18, 2012
    Publication date: June 19, 2014
    Applicants: XILINX INC., CADENCE DESIGN SYSTEMS, INC.
    Inventors: Efrat GAVISH, Yael Kinderman, Meirav O. Nitzan