Abstract: A system for removing energy from an electrical choke is provided. The system includes one or more cores, at least one inductive coupling, and a resistor. The one or more cores are configured to form part of the electrical choke by generating magnetic energy. The at least one inductive coupling is operative to convert the magnetic energy into electrical energy. The resistor is electrically connected to the at least one inductive coupling and operative to dissipate the electrical energy as heat.

Abstract: A switching amplifier includes a power device and a processing device. The power device is configured for powering a load and is comprised of a plurality of switches. The processing device configured to calculate a switch junction temperature for a bonding wire in each switch based at least in part on a power loss of each switch; generate a first accumulated fatigue damage of the bonding wire in each switch based on the switch junction temperature; and generate an estimated remaining lifetime of the switching amplifier based on the first accumulated fatigue damages of the bonding wires in each switch.

Abstract: A system for removing energy from an electrical choke is provided. The system includes one or more cores, at least one inductive coupling, and a resistor. The one or more cores are configured to form part of the electrical choke by generating magnetic energy. The at least one inductive coupling is operative to convert the magnetic energy into electrical energy. The resistor is electrically connected to the at least one inductive coupling and operative to dissipate the electrical energy as heat.

Abstract: The present disclosure presents techniques to facilitate improving operation of an electrical system, which includes a bus structure that cascades multiple electrical devices. The bus structure includes a first outer conductive layer implemented as a positive layer; a second outer conductive layer implemented as a negative layer; a first intermediate conductive layer neighboring the first outer conductive layer; a second intermediate conductive layer neighboring the second outer conductive layer; and a third intermediate conductive layer neighboring the second intermediate conductive layer, in which the third intermediate conductive layer is implemented as an inter-device layer that facilitates electrically coupling at least two of the electrical devices in series.

Abstract: The present disclosure presents techniques to facilitate improving operation of an electrical system, which includes a bus structure that cascades multiple electrical devices. The bus structure includes a first outer conductive layer implemented as a positive layer; a second outer conductive layer implemented as a negative layer; a first intermediate conductive layer neighboring the first outer conductive layer; a second intermediate conductive layer neighboring the second outer conductive layer; and a third intermediate conductive layer neighboring the second intermediate conductive layer, in which the third intermediate conductive layer is implemented as an inter-device layer that facilitates electrically coupling at least two of the electrical devices in series.

Abstract: A switching amplifier includes a power device and a processing device. The power device is configured for powering a load and is comprised of a plurality of switches. The processing device configured to calculate a switch junction temperature for a bonding wire in each switch based at least in part on a power loss of each switch; generate a first accumulated fatigue damage of the bonding wire in each switch based on the switch junction temperature; and generate an estimated remaining lifetime of the switching amplifier based on the first accumulated fatigue damages of the bonding wires in each switch.

Abstract: A diode rectifier system for generator excitation includes a plurality of diode modules mounted on a heatsink and a coolant tube provided in the heatsink. The heatsink is electrically grounded. A method of cooling a diode rectifier system for generator excitation comprises providing a flow of liquid coolant in the coolant tube and electrically grounding the heatsink.

Abstract: A method for forming a copper interconnect on an integrated circuit (IC) begins by forming a dielectric layer (20) having an opening. A tantalum-based barrier layer (21), such as TaN or TaSiN, is formed within the opening in the layer (20). A copper layer (22) is formed over the barrier layer (21). A first CMP process is used to polish the copper (22) to expose portions of the barrier (21). A second CMP process which is different from the first CMP process is then used to polish exposed portions of the layer (21) faster than the dielectric layer (20) or the copper layer (22). After this two-step CMP process, a copper interconnect having a tantalum-based barrier is formed across the integrated circuit substrate (12).

Abstract: A process has been developed for a post-chemical mechanical polishing cleaning/passivting step to remove slurry particles (52) and form a passivating film (64) from a portion of an interconnect material within a conductive layer (42) without attacking the interconnecting material. In one particular embodiment, a solution having a pH greater than the isoelectric point of alumina particles is exposed to the surface of an interconnect material of a conductive layer (42) to passivate a portion of the interconnect material while changing the charge of the slurry particles (52) such that they are repelled away from the surface of the substrate and removed by the cleaning solution, or other cleaning processes.

Abstract: A method for chemical mechanical polishing (CMP) a copper layer (22) begins by forming the copper layer (22). The copper layer (22) is then exposed to a slurry (24). The slurry (24) contains an oxidizing agent such as H.sub.2 O.sub.2, a carboxylate salt such as ammonium citrate, an abrasive slurry such as alumna abrasive, an optional triazole or triazole derivative, and a remaining balance of a solvent such as deionized water. The use of the slurry (24) polishes the copper layer (22) with a high rate of removal whereby pitting and corrosion of the copper layer (22) is reduced and good copper interconnect planarity is achieved. This slurry (24) has good selectivity of copper to oxide, and results in copper devices which have good electrical performance. In addition, disposal of the slurry (24) is not environmentally difficult since the slurry (24) is environmentally sound when compared to other prior art slurries.

Abstract: A method of manufacturing a semiconductor device includes providing (51) a substrate (19), providing (52) a colloid (17) having particles held in suspension, providing (53) a reagent (18), disposing (54) the substrate (19) in a processing tool (10), combining (55) the colloid (17) and the reagent (18) to form a slurry (28), decomposing (56) the reagent (18) into a surfactant and an oxidizer, using (57) the slurry (28) to process the substrate (19) in the processing tool (10), and removing (58) the substrate (19) from the processing tool (10).

Abstract: A method for chemical/mechanical polishing (CMP) uses a slurry (22). This slurry (22) contains one or more ammonium salts, such as ammonium nitride (NH.sub.4 NO.sub.3), as an oxidizing/etching species within the slurry (22). This slurry (22) is used to polish a metal layer (14) whereby the ammonium salt does not create slurry distribution problems, does not contain metallic species, does not contain mobile ions like potassium, and is environmentally safe.