Abstract: A method for securing a plurality of compute nodes includes authenticating a hardware architecture of each of a plurality of components of the compute nodes. The method also includes authenticating a firmware of each of the plurality of components. Further, the method includes generating an authentication database comprising a plurality of authentication descriptions that are based on the authenticated hardware architecture and the authenticated firmware. Additionally, a policy for securing a specified subset of the plurality of compute nodes is implemented by using the authentication database.

Abstract: A method for securing a plurality of compute nodes includes authenticating a hardware architecture of each of a plurality of components of the compute nodes. The method also includes authenticating a firmware of each of the plurality of components. Further, the method includes generating an authentication database comprising a plurality of authentication descriptions that are based on the authenticated hardware architecture and the authenticated firmware. Additionally, a policy for securing a specified subset of the plurality of compute nodes is implemented by using the authentication database.

Abstract: A method for securing a plurality of compute nodes includes authenticating a hardware architecture of each of a plurality of components of the compute nodes. The method also includes authenticating a firmware of each of the plurality of components. Further, the method includes generating an authentication database comprising a plurality of authentication descriptions that are based on the authenticated hardware architecture and the authenticated firmware. Additionally, a policy for securing a specified subset of the plurality of compute nodes is implemented by using the authentication database.

Abstract: A method for securing a plurality of compute nodes includes authenticating a hardware architecture of each of a plurality of components of the compute nodes. The method also includes authenticating a firmware of each of the plurality of components. Further, the method includes generating an authentication database comprising a plurality of authentication descriptions that are based on the authenticated hardware architecture and the authenticated firmware. Additionally, a policy for securing a specified subset of the plurality of compute nodes is implemented by using the authentication database.

Abstract: An example memory device comprises at least one memory region; and a controller to determine exceeding of a throttling threshold and to throttle processing of access requests for the at least one memory region.

Abstract: An example memory device comprises at least one memory region; and a controller to determine exceeding of a throttling threshold and to throttle processing of access requests for the at least one memory region.

Abstract: An example system includes a communication channel and at least one tuning structure coupled to the communication channel. The tuning structure includes a branch of the communication channel. The tuning structure is to dissipate energy from the communication channel at least at one selected wavelength. The branch of the communication channel is a terminated portion.

Abstract: An example system includes a communication channel and at least one tuning structure coupled to the communication channel. The tuning structure includes a branch of the communication channel. The tuning structure is to dissipate energy from the communication channel at least at one selected wavelength. The branch of the communication channel is a terminated portion.

Abstract: An example memory device comprises at least one memory region; and a controller to determine exceeding of a throttling threshold and to throttle processing of access requests for the at least one memory region.

Abstract: Methods and apparatuses are disclosed for allocating a bus in a computer system. In one embodiment, an apparatus comprises: a bus divided into at least two segments, a first segment of the bus routed to a first device, a second segment of the bus routed to an adapter capable of further dividing the second segment into multiple sub-segments, where the adapter routes the multiple sub-segments between the first device and a second device.

Abstract: A fan controller is described herein that can be connected to other fan controllers to provide fault information from one controller to the other(s). The fan controllers each control one or more fans. The controllers include signal(s) connected between the controllers that transmit fault information from one fan controller to the other(s) without the involvement of the host processor. Further, the controllers are capable of performing a “free wheeling” test in which idle fans are spun and tested.