Patents by Inventor Melvin D. Bodily

Melvin D. Bodily has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8874983
    Abstract: A test method for an ASIC uses an embedded processor in the ASIC to execute test routines from an embedded memory or an external memory. During ASIC production, the test routines can comprehensively test of the blocks of the ASIC without a complicated test pattern from test equipment. The test routines can also perform power-up tests in systems or end products containing the ASIC. Test selection, activation, and result output can be implemented using a few terminals of the ASIC.
    Type: Grant
    Filed: October 21, 2013
    Date of Patent: October 28, 2014
    Assignee: Marvell International Technology Ltd.
    Inventors: Richard D Taylor, Mark D Montierth, Melvin D Bodily, Gary Zimmerman, John D Marshall
  • Publication number: 20140068333
    Abstract: A test method for an ASIC uses an embedded processor in the ASIC to execute test routines from an embedded memory or an external memory. During ASIC production, the test routines can comprehensively test of the blocks of the ASIC without a complicated test pattern from test equipment. The test routines can also perform power-up tests in systems or end products containing the ASIC. Test selection, activation, and result output can be implemented using a few terminals of the ASIC.
    Type: Application
    Filed: October 21, 2013
    Publication date: March 6, 2014
    Applicant: Marvell International Technology LTD
    Inventors: Richard D. Taylor, Mark D. Montierth, Melvin D. Bodily, Gary Zimmerman, John D. Marshall
  • Patent number: 8566660
    Abstract: A test method for an ASIC uses an embedded processor in the ASIC to execute test routines from an embedded memory or an external memory. During ASIC production, the test routines can comprehensively test of the blocks of the ASIC without a complicated test pattern from test equipment. The test routines can also perform power-up tests in systems or end products containing the ASIC. Test selection, activation, and result output can be implement using a few terminals of the ASIC.
    Type: Grant
    Filed: November 21, 2012
    Date of Patent: October 22, 2013
    Assignee: Marvell International Technology Ltd
    Inventors: Richard D Taylor, Mark D Montierth, Melvin D Bodily, Gary Zimmerman, John D Marshall
  • Publication number: 20120036396
    Abstract: A test method for an ASIC uses an embedded processor in the ASIC to execute test routines from an embedded memory or an external memory. During ASIC production, the test routines can comprehensively test of the blocks of the ASIC without a complicated test pattern from test equipment. The test routines can also perform power-up tests in systems or end products containing the ASIC. Test selection, activation, and result output can be implement using a few terminals of the ASIC.
    Type: Application
    Filed: October 20, 2011
    Publication date: February 9, 2012
    Inventors: Richard D. Taylor, Mark D. Montierth, Melvin D. Bodily, Gary Zimmerman, John D. Marshall
  • Patent number: 8046652
    Abstract: A test method for an ASIC uses an embedded processor in the ASIC to execute test routines from an embedded memory or an external memory. During ASIC production, the test routines can comprehensively test of the blocks of the ASIC without a complicated test pattern from test equipment. The test routines can also perform power-up tests in systems or end products containing the ASIC. Test selection, activation, and result output can be implement using a few terminals of the ASIC.
    Type: Grant
    Filed: February 15, 2011
    Date of Patent: October 25, 2011
    Assignee: Marvell International Tecnology Ltd.
    Inventors: Richard D. Taylor, Mark D. Montierth, Melvin D. Bodily, Gary D. Zimmerman, John D. Marshall
  • Publication number: 20110138241
    Abstract: A test method for an ASIC uses an embedded processor in the ASIC to execute test routines from an embedded memory or an external memory. During ASIC production, the test routines can comprehensively test of the blocks of the ASIC without a complicated test pattern from test equipment. The test routines can also perform power-up tests in systems or end products containing the ASIC. Test selection, activation, and result output can be implement using a few terminals of the ASIC.
    Type: Application
    Filed: February 15, 2011
    Publication date: June 9, 2011
    Inventors: Richard D. Taylor, Mark D. Montierth, Melvin D. Bodily, Gary Zimmerman, John D. Marshall
  • Patent number: 7890828
    Abstract: A test method for an ASIC uses an embedded processor in the ASIC to execute test routines from an embedded memory or an external memory. During ASIC production, the test routines can comprehensively test of the blocks of the ASIC without a complicated test pattern from test equipment. The test routines can also perform power-up tests in systems or end products containing the ASIC. Test selection, activation, and result output can be implement using a few terminals of the ASIC.
    Type: Grant
    Filed: August 22, 2008
    Date of Patent: February 15, 2011
    Assignee: Marvell International Technology Ltd.
    Inventors: Richard D. Taylor, Mark D. Montierth, Melvin D. Bodily, Gary Zimmerman, John D. Marshall
  • Publication number: 20090013229
    Abstract: A test method for an ASIC uses an embedded processor in the ASIC to execute test routines from an embedded memory or an external memory. During ASIC production, the test routines can comprehensively test of the blocks of the ASIC without a complicated test pattern from test equipment. The test routines can also perform power-up tests in systems or end products containing the ASIC. Test selection, activation, and result output can be implement using a few terminals of the ASIC.
    Type: Application
    Filed: August 22, 2008
    Publication date: January 8, 2009
    Inventors: Richard D. Taylor, Mark D. Montierth, Melvin D. Bodily, Gary Zimmerman, John D. Marshall
  • Patent number: 7418642
    Abstract: A test method for an ASIC uses an embedded processor in the ASIC to execute test routines from an embedded memory or an external memory. During ASIC production, the test routines can comprehensively test of the blocks of the ASIC without a complicated test pattern from test equipment. The test routines can also perform power-up tests in systems or end products containing the ASIC. Test selection, activation, and result output can be implement using a few terminals of the ASIC.
    Type: Grant
    Filed: July 30, 2001
    Date of Patent: August 26, 2008
    Assignee: Marvell International Technology Ltd.
    Inventors: Richard D. Taylor, Mark D. Montierth, Melvin D. Bodily, Gary Zimmerman, John D. Marshall
  • Patent number: 6971051
    Abstract: Managing volatile storage of information, such as executable code within dynamic random access memory (DRAM) embedded within an application specific integrated circuit (ASIC), includes systematically checking the contents of the volatile memory during periods of extended inactivity. Volatile memory checking routines may be initiated on the basis of time, on the basis of a specific event, or on a combination of timing and event occurrences. If a specific error condition is detected, the device in which the volatile memory resides may be automatically reinitialized, so that the corrupt executable code is not used. The information management techniques may be extended to other types of semi-permanent memory i.e., memory that is susceptible to losses in the form of soft errors.
    Type: Grant
    Filed: January 10, 2002
    Date of Patent: November 29, 2005
    Assignee: Agilent Technologies, Inc.
    Inventors: Richard D. Taylor, Mark D. Montierth, Melvin D. Bodily, Elizabeth A. Leonard, Gary Zimmerman
  • Publication number: 20030131307
    Abstract: Managing volatile storage of information, such as executable code within dynamic random access memory (DRAM) embedded within an application specific integrated circuit (ASIC), includes systematically checking the contents of the volatile memory during periods of extended inactivity. Volatile memory checking routines may be initiated on the basis of time, on the basis of a specific event, or on a combination of timing and event occurrences. If a specific error condition is detected, the device in which the volatile memory resides may be automatically reinitialized, so that the corrupt executable code is not used. The information management techniques may be extended to other types of semi-permanent memory i.e., memory that is susceptible to losses in the form of soft errors.
    Type: Application
    Filed: January 10, 2002
    Publication date: July 10, 2003
    Inventors: Richard D. Taylor, Mark D. Montierth, Melvin D. Bodily, Elizabeth A. Leonard, Gary Zimmerman
  • Publication number: 20030023914
    Abstract: A test method for an ASIC uses an embedded processor in the ASIC to execute test routines from an embedded memory or an external memory. During ASIC production, the test routines can comprehensively test of the blocks of the ASIC without a complicated test pattern from test equipment. The test routines can also perform power-up tests in systems or end products containing the ASIC. Test selection, activation, and result output can be implement using a few terminals of the ASIC.
    Type: Application
    Filed: July 30, 2001
    Publication date: January 30, 2003
    Inventors: Richard D. Taylor, Mark D. Montierth, Melvin D. Bodily, Garz Zimmerman, John D. Marshall