Patents by Inventor Melvin Martin

Melvin Martin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11532489
    Abstract: A substrate is provided having a top side and a bottom side, having redistribution layers therein, having at least one copper pillar connected to the redistribution layers on the top side and at least one copper pillar connected to the redistribution layers on the bottom side, and having at least one cavity extending partially into the bottom side of the substrate. At least one passive component is mounted onto the copper pillar on the top side and embedded in a molding compound. At least one silicon die is mounted in the cavity wherein electrical connections are made between the at least one silicon die and the at least one passive component through the redistribution layers. At least one solder ball is mounted on the at least one copper pillar on the bottom side of the substrate to provide package output.
    Type: Grant
    Filed: June 11, 2021
    Date of Patent: December 20, 2022
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Ernesto Gutierrez, III, Jesus Mennen Belonio, Jr., Eric Hu, Melvin Martin, Jerry Li, Francisco Vergara Cadacio
  • Patent number: 11309255
    Abstract: A system in package is provided comprising an embedded trace substrate having redistribution layers therein, at least one passive component mounted on one side of the embedded trace substrate and embedded in a first molding compound, at least one silicon die mounted on an opposite side of the embedded trace substrate and embedded in a second molding compound wherein electrical connections are made between the at least one silicon die and the at least one passive component through the redistribution layers, and solder balls mounted through openings in the second molding layer to the redistribution layers wherein the solder balls provide package output.
    Type: Grant
    Filed: March 26, 2020
    Date of Patent: April 19, 2022
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Jesus Mennen Belonio, Jr., Shou Cheng Eric Hu, Ian Kent, Ernesto Gutierrez, III, Melvin Martin, Rajesh Subraya Aiyandra
  • Publication number: 20210305167
    Abstract: A substrate is provided having a top side and a bottom side, having redistribution layers therein, having at least one copper pillar connected to the redistribution layers on the top side and at least one copper pillar connected to the redistribution layers on the bottom side, and having at least one cavity extending partially into the bottom side of the substrate. At least one passive component is mounted onto the copper pillar on the top side and embedded in a molding compound. At least one silicon die is mounted in the cavity wherein electrical connections are made between the at least one silicon die and the at least one passive component through the redistribution layers. At least one solder ball is mounted on the at least one copper pillar on the bottom side of the substrate to provide package output.
    Type: Application
    Filed: June 11, 2021
    Publication date: September 30, 2021
    Inventors: Ernesto Gutierrez, III, Jesus Mennen Belonio, Eric Hu, Melvin Martin, Jerry Li, Francisco Vergara Cadacio
  • Patent number: 11075167
    Abstract: A substrate is provided having a top side and a bottom side, having redistribution layers therein, having at least one copper pillar connected to the redistribution layers on the top side and at least one copper pillar connected to the redistribution layers on the bottom side, and having at least one cavity extending partially into the bottom side of the substrate. At least one passive component is mounted onto the copper pillar on the top side and embedded in a molding compound. At least one silicon die is mounted in the cavity wherein electrical connections are made between the at least one silicon die and the at least one passive component through the redistribution layers. At least one solder ball is mounted on the at least one copper pillar on the bottom side of the substrate to provide package output.
    Type: Grant
    Filed: February 1, 2019
    Date of Patent: July 27, 2021
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Ernesto Gutierrez, III, Jesus Mennen Belonio, Jr., Eric Hu, Melvin Martin, Jerry Li, Francisco Vergara Cadacio
  • Publication number: 20200251350
    Abstract: A substrate is provided having a top side and a bottom side, having redistribution layers therein, having at least one copper pillar connected to the redistribution layers on the top side and at least one copper pillar connected to the redistribution layers on the bottom side, and having at least one cavity extending partially into the bottom side of the substrate. At least one passive component is mounted onto the copper pillar on the top side and embedded in a molding compound. At least one silicon die is mounted in the cavity wherein electrical connections are made between the at least one silicon die and the at least one passive component through the redistribution layers. At least one solder ball is mounted on the at least one copper pillar on the bottom side of the substrate to provide package output.
    Type: Application
    Filed: February 1, 2019
    Publication date: August 6, 2020
    Inventors: Ernesto Gutierrez, III, Jesus Mennen Belonio, JR., Eric Hu, Melvin Martin, Jerry Li, Francisco Vergara Cadacio
  • Publication number: 20200227356
    Abstract: A system in package is provided comprising an embedded trace substrate having redistribution layers therein, at least one passive component mounted on one side of the embedded trace substrate and embedded in a first molding compound, at least one silicon die mounted on an opposite side of the embedded trace substrate and embedded in a second molding compound wherein electrical connections are made between the at least one silicon die and the at least one passive component through the redistribution layers, and solder balls mounted through openings in the second molding layer to the redistribution layers wherein the solder balls provide package output.
    Type: Application
    Filed: March 26, 2020
    Publication date: July 16, 2020
    Inventors: Jesus Mennen Belonio, JR., Shou Cheng Eric Hu, Ian Kent, Ernesto Gutierrez, III, Melvin Martin, Rajesh Subraya Aiyandra
  • Patent number: 10636742
    Abstract: A system in package is provided comprising an embedded trace substrate having redistribution layers therein, at least one passive component mounted on one side of the embedded trace substrate and embedded in a first molding compound, at least one silicon die mounted on an opposite side of the embedded trace substrate and embedded in a second molding compound wherein electrical connections are made between the at least one silicon die and the at least one passive component through the redistribution layers, and solder balls mounted through openings in the second molding layer to the redistribution layers wherein the solder balls provide package output.
    Type: Grant
    Filed: September 28, 2017
    Date of Patent: April 28, 2020
    Assignee: Dialog Semiconductor (US) Limited
    Inventors: Jesus Mennen Belonio, Jr., Shou Cheng Eric Hu, Ian Kent, Ernesto Gutierrez, III, Melvin Martin, Rajesh Subraya Aiyandra
  • Patent number: 10410996
    Abstract: An integrated circuit IC package with one or more pins protruding from the IC package for electrically connecting the IC package with a printed circuit board PCB is presented. The IC package has a first die with a first electronic component, a second die with a second electronic component, and a conductive plate having a plane surface. The first electronic component may be a semiconductor power device and the second electronic component may be a control circuit. The plane surface of the conductive plate is electrically connected to both a plane surface of the first die and one or more pins such that an electrical connection is established between the first die and the one or more pins. The second die may be arranged on top of the conductive plate. Alternatively, a third die with a third electronic component may be arranged on top of the conductive plate.
    Type: Grant
    Filed: December 2, 2016
    Date of Patent: September 10, 2019
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Melvin Martin, Baltazar Canete, Jr., Macario Campos, Rajesh Aiyandra
  • Publication number: 20190259689
    Abstract: A method of fabricating an integrated circuit package having improved heat dissipation is described. A re-routable clip is provided having a central portion and a plurality of leads surrounding the central portion. A die is attached to an underside of the central portion of the re-routable clip. The die and the leads of the re-routable clip are attached to a substrate. The die and the leads are encapsulated with a mold compound wherein a top surface of the central portion of the re-routable clip is exposed by the mold compound. The substrate is connected to a printed circuit board wherein thermal pathways are formed 1) from the die downward to the substrate to the printed circuit board and 2) from the die upward to the re-routable clip and then downward through the leads to the substrate and to the printed circuit board.
    Type: Application
    Filed: February 19, 2018
    Publication date: August 22, 2019
    Inventors: Tung Ching Lui, Baltazar Canete, Melvin Martin, Rajesh Subraya Aiyandra
  • Patent number: 10332864
    Abstract: An integrated circuit IC package with one or more pins protruding from the IC package for electrically connecting the IC package with a printed circuit board PCB is presented. The IC package has a first die with a first electronic component, a second die with a second electronic component, and a conductive plate having a plane surface. The first electronic component may be a semiconductor power device and the second electronic component may be a control circuit. The plane surface of the conductive plate is electrically connected to both a plane surface of the first die and one or more pins such that an electrical connection is established between the first die and the one or more pins. The second die may be arranged on top of the conductive plate. Alternatively, a third die with a third electronic component may be arranged on top of the conductive plate.
    Type: Grant
    Filed: December 2, 2016
    Date of Patent: June 25, 2019
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Melvin Martin, Baltazar Canete, Jr., Macario Campos, Rajesh Aiyandra
  • Publication number: 20190096815
    Abstract: A system in package is provided comprising an embedded trace substrate having redistribution layers therein, at least one passive component mounted on one side of the embedded trace substrate and embedded in a first molding compound, at least one silicon die mounted on an opposite side of the embedded trace substrate and embedded in a second molding compound wherein electrical connections are made between the at least one silicon die and the at least one passive component through the redistribution layers, and solder balls mounted through openings in the second molding layer to the redistribution layers wherein the solder balls provide package output.
    Type: Application
    Filed: September 28, 2017
    Publication date: March 28, 2019
    Inventors: Jesus Mennen Belonio, JR., Shou Cheng Eric Hu, Ian Kent, Ernesto Gutierrez, III, Melvin Martin, Rajesh Subraya Aiyandra
  • Publication number: 20180158804
    Abstract: An integrated circuit IC package with one or more pins protruding from the IC package for electrically connecting the IC package with a printed circuit board PCB is presented. The IC package has a first die with a first electronic component, a second die with a second electronic component, and a conductive plate having a plane surface. The first electronic component may be a semiconductor power device and the second electronic component may be a control circuit. The plane surface of the conductive plate is electrically connected to both a plane surface of the first die and one or more pins such that an electrical connection is established between the first die and the one or more pins. The second die may be arranged on top of the conductive plate. Alternatively, a third die with a third electronic component may be arranged on top of the conductive plate.
    Type: Application
    Filed: December 2, 2016
    Publication date: June 7, 2018
    Inventors: Melvin Martin, Baltazar Canete, JR., Macario Campos, Rajesh Aiyandra
  • Publication number: 20180025965
    Abstract: A quad flat no lead package is provided comprising at least one first integrated circuit die embedded in a recess in a die paddle of a metal leadframe and a second integrated circuit chip die attached to the at least one first integrated circuit die wherein the first and second integrated circuit dies are electrically connected to each other and wherein the second integrated circuit die is connected to leads of the leadframe through copper pillars.
    Type: Application
    Filed: July 19, 2016
    Publication date: January 25, 2018
    Inventors: Baltazar Canete, JR., Melvin Martin, Ian Kent, Jesus Mennen Belonio, JR., Rajesh Subraya Aiyandra
  • Publication number: 20140355215
    Abstract: An electronic package is fabricated wherein a substrate is provided having three or more layers. A heat slug is embedded completely within the substrate. A die is attached above the substrate. Thermal paths to the heat slug are linked through the ground signal interconnects (traces, vias and planes).
    Type: Application
    Filed: June 3, 2013
    Publication date: December 4, 2014
    Inventors: Baltazar Canete, Melvin Martin, Ian Kent