Patents by Inventor Melvin N. Levardo

Melvin N. Levardo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6753613
    Abstract: A microelectronic package including a first microelectronic die and a second microelectronic die with a plurality of standoffs extending therebetween and an encapsulation material disposed between the first microelectronic die and the second microelectronic die, which extends between at least two the plurality of standoffs.
    Type: Grant
    Filed: March 13, 2002
    Date of Patent: June 22, 2004
    Assignee: Intel Corporation
    Inventors: Melvin N. Levardo, Marcelo S. Gonzales
  • Publication number: 20030173679
    Abstract: A microelectronic package including a first microelectronic die and a second microelectronic die with a plurality of standoffs extending therebetween and an encapsulation material disposed between the first microelectronic die and the second microelectronic die, which extends between at least two the plurality of standoffs.
    Type: Application
    Filed: March 13, 2002
    Publication date: September 18, 2003
    Inventors: Melvin N. Levardo, Marcelo S. Gonzales
  • Patent number: 6600222
    Abstract: A microelectronic assembly including a flexible substrate with a first and a second surface, and with a microelectronic die portion and an external interconnect portion. The substrate has conductive traces integrated therewith. A first microelectronic die has an active surface electrically connected to the substrate first surface in the substrate microelectronic die portion. A second microelectronic die is electrically connected by its active surface to the substrate second surface in the substrate microelectronic die portion. External interconnect pads are disposed on the substrate second surface in the substrate external interconnect portion, wherein at least one conductive trace is in electrical contact with at least one external interconnect pad and with either the first microelectronic die, the second microelectronic die, or both. The substrate is folded and a portion of the first surface in the external interconnect portion is attached to a back surface of the first microelectronic die.
    Type: Grant
    Filed: July 17, 2002
    Date of Patent: July 29, 2003
    Assignee: Intel Corporation
    Inventor: Melvin N. Levardo