Patents by Inventor Melvy Freeland Miller

Melvy Freeland Miller has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6825092
    Abstract: A semiconductor device and a method of making a semiconductor device. A damascene metal layer (16) is formed in an insulating dielectric layer (12), which is in direct electrical communication with a substrate (10). A layer of a passive element, such as first capacitor electrode layer (20) is disposed on metal layer (16) and preferably is offset relative to metal layer (16) to allow a direct electrical interconnect through a via (36) to metal layer (16). In one embodiment a capacitor and a resistor are formed as passive elements in the device. In another embodiment, the passive element includes at least one resistor (28) and optionally a second resistor (32). In yet another embodiment, metal layer (16) is a damascene copper layer.
    Type: Grant
    Filed: September 13, 2002
    Date of Patent: November 30, 2004
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Peter Zurcher, Melvy Freeland Miller, III
  • Publication number: 20030017699
    Abstract: A semiconductor device and a method of making a semiconductor device. A damascene metal layer (16) is formed in an insulating dielectric layer (12), which is in direct electrical communication with a substrate (10). A layer of a passive element, such as first capacitor electrode layer (20) is disposed on metal layer (16) and preferably is offset relative to metal layer (16) to allow a direct electrical interconnect through a via (36) to metal layer (16). In one embodiment a capacitor and a resistor are formed as passive elements in the device. In another embodiment, the passive element includes at least one resistor (28) and optionally a second resistor (32). In yet another embodiment, metal layer (16) is a damascene copper layer.
    Type: Application
    Filed: September 13, 2002
    Publication date: January 23, 2003
    Inventors: Peter Zurcher, Melvy Freeland Miller
  • Patent number: 6500724
    Abstract: A semiconductor device and a method of making a semiconductor device. A damascene metal layer (16) is formed in an insulating dielectric layer (12), which is in direct electrical communication with a substrate (10). A layer of a passive element, such as first capacitor electrode layer (20) is disposed on metal layer (16) and preferably is offset relative to metal layer (16) to allow a direct electrical interconnect through a via (36) to metal layer (16). In one embodiment a capacitor and a resistor are formed as passive elements in the device. In another embodiment, the passive element includes at least one resistor (28) and optionally a second resistor (32). In yet another embodiment, metal layer (16) is a damascene copper layer.
    Type: Grant
    Filed: August 21, 2000
    Date of Patent: December 31, 2002
    Assignee: Motorola, Inc.
    Inventors: Peter Zurcher, Melvy Freeland Miller, III