Patents by Inventor Melvyn Goveas

Melvyn Goveas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11966677
    Abstract: A method is disclosed. The method includes computing a time delay for each path of a plurality of paths of a circuit design and determining a commonality score based on a number of segments that are common between the plurality of paths of the circuit design. The method further includes determining a criticality score based on the time delay for each path of the plurality of paths of the circuit design. The method further includes generating a graphical representation of the plurality of paths, wherein a first dimension of the graphical representation corresponds to the commonality score and wherein a second dimension of the graphical representation corresponds to the criticality score. The method further includes providing the graphical representation of the plurality of paths in a graphical user interface (GUI) to represent the plurality of paths in the circuit design.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: April 23, 2024
    Assignee: SYNOPSYS, INC.
    Inventors: Melvyn Goveas, Ribhu Mittal, Wen-Chi Feng, Yanhua Yi
  • Patent number: 6931629
    Abstract: A computer system and a computer-implemented method for generating test programs that satisfy at least one termination criterion. The computer system includes a hardware unit to transmit data. A processor is coupled to the hardware unit and to a storage device. The storage device has stored therein at least one algorithm and a plurality of routines. When the processor executes a routine(s), data is generated. The routine causes the processor to access an algorithm, generate a test program, and analyze a test program. A computer implemented method is also disclosed for generating test programs.
    Type: Grant
    Filed: December 30, 1999
    Date of Patent: August 16, 2005
    Assignee: Intel Corporation
    Inventors: Charles R. Yount, Melvyn A. Goveas
  • Publication number: 20050166096
    Abstract: A computer system and a computer-implemented method for generating test programs that satisfy at least one termination criterion. The computer system includes a hardware unit to transmit data. A processor is coupled to the hardware unit and to a storage device. The storage device has stored therein at least one algorithm and a plurality of routines. When the processor executes a routine(s), data is generated. The routine causes the processor to access an algorithm, generate a test program, and analyze a test program. A computer implemented method is also disclosed for generating test programs.
    Type: Application
    Filed: January 13, 2005
    Publication date: July 28, 2005
    Inventors: Charles Yount, Melvyn Goveas
  • Patent number: 5386211
    Abstract: An effective method and apparatus for compressing binary data with little processor overhead. The input string of binary data is read into a buffer, where it is then analyzed to determine if a pattern exists. If a pattern does exist, the pattern value is determined and stored in a list, with a length value indicative of the number of sequential occurrences of the pattern. Thus, repeatable patterns are stored simply by increasing the length parameter. Preferably, the list accommodates both patterns and single binary values which can be stored in a store-on-change format. The resulting data structure provides an entry for a pattern value or a binary value as well as a length value which identifies the number of repetitions of the pattern or binary value.
    Type: Grant
    Filed: September 29, 1993
    Date of Patent: January 31, 1995
    Assignee: Intel Corporation
    Inventor: Melvyn A. Goveas