Abstract: An apparatus, system, and method are disclosed for modifying memory device timing and voltage. A detection module detects a change of memory device stress. A timing modification module modifies the memory device timing in response to the change of the memory device stress. In addition, a voltage modification module modifies the memory device voltage in response to the change of the memory device stress. In one embodiment, a processor pause module pauses the operation of a processor module while the timing modification module modifies the memory device timing and the voltage modification module modifies the memory device voltage.

Abstract: Data processing devices arranged in a redundant manner, with each of the devices including a thermal sensor measuring its operating temperature, are allocated so that data is processed by the coolest available device. In one form of the invention, the same data is stored in two data storage devices to be retrieved from the device having a cooler operating temperature. When the data is to be stored, it may further be stored in the coolest one of a number of storage devices. In other forms of the invention, the data processing devices are, for example, adapter circuits or computer systems accessed by a server.

Abstract: An apparatus, system, and method are disclosed for modifying memory device timing and voltage. A detection module detects a change of memory device stress. A timing modification module modifies the memory device timing in response to the change of the memory device stress. In addition, a voltage modification module modifies the memory device voltage in response to the change of the memory device stress. In one embodiment, a processor pause module pauses the operation of a processor module while the timing modification module modifies the memory device timing and the voltage modification module modifies the memory device voltage.