Abstract: A transistor includes a first semiconductor layer, a second semiconductor layer, a semiconductor nanosheet, a gate electrode and source and drain electrodes. The semiconductor nanosheet is physically connected to the first semiconductor layer and the second semiconductor layer. The gate electrode wraps around the semiconductor nanosheet. The source and drain electrodes are disposed at opposite sides of the gate electrode. The first semiconductor layer surrounds the source electrode, the second semiconductor layer surrounds the drain electrode, and the semiconductor nanosheet is disposed between the source and drain electrodes.

Abstract: A testing system includes a signal generator circuit, a jitter modulation circuit, and an oscilloscope circuit. The signal generator circuit is configured to generate a clock pattern signal with a single clock pattern frequency. The jitter modulation circuit is configured to generate a jitter signal. A device-under-test is configured to receive an input signal. The input signal is a combination signal of the clock pattern signal and the jitter signal. The device-under-test includes a clock data recovery circuit and is further configured to generate an output signal according to the input signal. The oscilloscope circuit is configured to receive the output signal for determining performance of the clock data recovery circuit.

Abstract: The application discloses a transceiver, including a calibration signal generation unit, a transmission unit, a receiving unit and a control unit. The calibration signal generation unit generates test signal to the transmission unit in a phase calibration mode. The receiving unit generates a digital receiving signal. The control unit calculates a phase difference between the digital receiving signal and a given reference phase and selectively adjust the transmission unit or the receiving unit accordingly. The application discloses a transceiver calibration method as well.

Abstract: A calibration circuit and a calibration method for a wireless transceiver are provided. The wireless transceiver includes a transmission path and a reception path, and the transmission path includes a radio frequency (RF) circuit and a baseband amplifier. The calibration method includes the following steps: setting a target gain of the RF circuit according to a first gain setting value; receiving a first input signal through a coupling path and the reception path; measuring first power of the first input signal; setting the target gain of the RF circuit according to a second gain setting value; receiving a second input signal through the coupling path and the reception path; measuring second power of the second input signal; calculating a power difference between the first power and the second power; and adjusting at least one of the baseband amplifier and a digital circuit according to the power difference.

Abstract: The application discloses a transceiver, including a calibration signal generation unit, a transmission unit, a receiving unit and a control unit. The calibration signal generation unit generates test signal to the transmission unit in a phase calibration mode. The receiving unit generates a digital receiving signal. The control unit calculates a phase difference between the digital receiving signal and a given reference phase and selectively adjust the transmission unit or the receiving unit accordingly. The application discloses a transceiver calibration method as well.

Abstract: A linearity test system for a chip, a linearity signal providing device, and a linearity test method for the chip are provided. The linearity test method for the chip includes steps as follows: providing a reference clock signal and a receiver input signal to a chip under test, wherein the reference clock signal and the receiver input signal have a phase difference in time domain; and determining a linearity of a phase interpolator of the chip under test based on a plurality of phase signals of the chip under test corresponding to the reference clock signal and the receiver input signal.

Abstract: The invention provides an integrated circuit (IC) structure including a function circuit and a power ground (P/G) mesh electrically connected with the function circuit. The P/G mesh includes a first metal layer and a second metal layer. The first metal layer and the second metal layer are respectively disposed with a plurality of ground wires and a plurality of power wires. The power wires of the first metal layer are electrically connected with the power wires of the second metal layer through a plurality of first vias, and the ground wires of the first metal layer are electrically connected with the ground wires of the second metal layer through a plurality of second vias. A wire impedance of the first metal layer is different from a wire impedance of the second metal layer. The IC structure can achieve reduction of an IR-drop.

Abstract: A system for use in displaying modulated light includes a light source operable to generate a light beam. The system also includes a color wheel for receiving the light beam. The color wheel comprises a plurality of translucent segments. The plurality of translucent segments comprises a first number of blue segments, the first number of red segments, and a second number of green segments wherein the first number is greater than the second number and the second number is at least one.

Abstract: A system for use in displaying modulated light includes a light source operable to generate a light beam. The system also includes a color wheel for receiving the light beam. The color wheel comprises a plurality of translucent segments. The plurality of translucent segments comprises a first number of blue segments, the first number of red segments, and a second number of green segments wherein the first number is greater than the second number and the second number is at least one.

Abstract: A method to provide improved medium access control (MAC) protocol for a wireless local area network (LAN) comprising the steps of: (a) pre-arranging a polling cycle to be broadcast from the base station into a sequence of broadcast groups, (b) assigning each active mobile node to a randomly chosen broadcast group, (c) performing a group randomly addressed polling for each of the broadcast groups, and (d) assigning uncollided mobile nodes to their original randomly chosen broadcast group address. The uncollided mobile nodes will also be given the privilege of keeping their random numbers as fixed random numbers, until they collide with other mobile node(s) in subsequent polling cycle(s). All the collided mobile nodes, all newly active mobiles, and all newly joined mobile nodes are subject to a new polling cycle. The method has shown to provide excellent throughput (better than 0.90), stable convergence, and excellent delay behavior.