Patents by Inventor Meng-Che Yeh

Meng-Che Yeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of forming gate dielectric layer for MOS transistor
    Patent number: 9761687
    Abstract: A method of forming a gate dielectric layer for a MOS transistor includes the following steps. A gate dielectric layer is formed on a substrate. A nitridation process is performed on the gate dielectric layer. A multi-step post nitridation annealing process including two oxygen-containing annealing steps with different respective annealing temperatures is performed on the gate dielectric layer.
    Type: Grant
    Filed: January 4, 2015
    Date of Patent: September 12, 2017
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Han-Lin Hsu, Po-Lun Cheng, Chun-Liang Chen, Meng-Che Yeh, Shih-Jung Tu
  • ACID REPLENISHING SYSTEM AND METHOD FOR ACID TANK
    Publication number: 20170098558
    Abstract: An acid replenishing system includes an acid tank, a draining apparatus, an acid replenishing apparatus, and a control unit. The acid tank contains a used acid solution. The draining apparatus drains an amount of the used acid solution from the acid tank. The acid replenishing apparatus replenishes an amount of a replenishing acid into the acid tank. The control unit controls the draining apparatus and the acid replenishing apparatus to perform a plurality of acid replenishing stages, so a total set amount of the replenishing acid to be added into the acid tank has been replenished.
    Type: Application
    Filed: November 6, 2015
    Publication date: April 6, 2017
    Inventors: Tzung-Wu Hou, Po-Lun Cheng, Meng-Che Yeh, Feng-Nan Chu
  • METHOD OF FORMING GATE DIELECTRIC LAYER FOR MOS TRANSISTOR
    Publication number: 20160196971
    Abstract: A method of forming a gate dielectric layer for a MOS transistor includes the following steps. A gate dielectric layer is formed on a substrate. A nitrdation process is performed on the gate dielectric layer. A multi-step post nitridation annealing process including two oxygen-containing annealing steps with different respective annealing temperatures is performed on the gate dielectric layer.
    Type: Application
    Filed: January 4, 2015
    Publication date: July 7, 2016
    Inventors: Han-Lin Hsu, Po-Lun Cheng, Chun-Liang Chen, Meng-Che Yeh, Shih-Jung Tu