Patents by Inventor Meng-Cheng PENG

Meng-Cheng PENG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Flip-flop devices with clock sharing
    Patent number: 9660615
    Abstract: A flip-flop device is provided. The flip-flop device includes a first flip-flop and a clock controller. The first flip-flop receives a first clock signal and a second clock signal for operation. The clock controller receives a clock source signal and generates the first clock signal and the second clock signal according to the clock source signal. Each of the first clock signal and the second clock signal switches between a first voltage level and a second voltage level. For each of the first clock signal and the second clock signal, a period of the first voltage level is shorter than a period of the second voltage level. The period of the first voltage level of the first clock signal and the period of the first voltage level of the second clock signal are non-overlapping.
    Type: Grant
    Filed: January 29, 2015
    Date of Patent: May 23, 2017
    Assignee: MEDIATEK INC.
    Inventors: Meng-Cheng Peng, Rei-Fu Huang
  • FLIP-FLOP DEVICES WITH CLOCK SHARING
    Publication number: 20160226469
    Abstract: A flip-flop device is provided. The flip-flop device includes a first flip-flop and a clock controller. The first flip-flop receives a first clock signal and a second clock signal for operation. The clock controller receives a clock source signal and generates the first clock signal and the second clock signal according to the clock source signal. Each of the first clock signal and the second clock signal switches between a first voltage level and a second voltage level. For each of the first clock signal and the second clock signal, a period of the first voltage level is shorter than a period of the second voltage level. The period of the first voltage level of the first clock signal and the period of the first voltage level of the second clock signal are non-overlapping.
    Type: Application
    Filed: January 29, 2015
    Publication date: August 4, 2016
    Inventors: Meng-Cheng PENG, Rei-Fu HUANG