Patents by Inventor Meng-Chi Chen

Meng-Chi Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240164069
    Abstract: A ceramic substrate structure includes a ceramic board, a first conductive layer, a second conductive layer and a heat dissipation layer. The ceramic board has a first surface and a second surface opposite to each other. Each of the first surface and the second surface is a single surface extending continuously. The first conductive layer is mounted on the first surface of the ceramic board. The second conductive layer is mounted on the first surface of the ceramic board. The second conductive layer is adjacent to the first conductive layer and have different thicknesses. The heat dissipation layer is mounted on the second surface of the ceramic board. The heat dissipation layer includes a first heat dissipation portion corresponding to the first conductive layer and a second heat dissipation portion corresponding to the second conductive layer, and the second heat dissipation portion has a patterned region.
    Type: Application
    Filed: December 21, 2022
    Publication date: May 16, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yue-Zhen HUANG, Meng-Chi HUANG, Tune-Hune KAO, Min-Chieh CHOU, Jie-Chi CHEN
  • Publication number: 20240150567
    Abstract: A resin composition and the uses of it are provided. The resin composition comprises: (A) a polyfunctional vinyl aromatic copolymer; and (B) a diene compound, represented by the following formula (I) wherein, in formula (I), R10 and R11 are independently H, a C1-C6 linear or branched alkyl, with the proviso that R10 and R11 are not simultaneously H; and the polyfunctional vinyl aromatic copolymer (A) is prepared by copolymerizing one or more divinyl aromatic compounds with one or more monovinyl aromatic compounds.
    Type: Application
    Filed: November 17, 2022
    Publication date: May 9, 2024
    Applicant: TAIWAN UNION TECHNOLOGY CORPORATION
    Inventors: JEN-CHI CHIANG, MENG-HUEI CHEN
  • Patent number: 11950016
    Abstract: The present invention provides a control method of a receiver. The control method includes the steps of: when the receiver enters a sleep/standby mode, continually detecting an auxiliary signal from an auxiliary channel to generate a detection result; and if the detection result indicates that the auxiliary signal has a preamble or a specific pattern, generating a wake-up control signal to wake up the receiver before successfully receiving the auxiliary signal having a wake-up command.
    Type: Grant
    Filed: April 15, 2020
    Date of Patent: April 2, 2024
    Assignee: MEDIATEK INC.
    Inventors: Chun-Chia Chen, Chih-Hung Pan, Chia-Chi Liu, Shun-Fang Liu, Meng-Kun Li, Chao-An Chen
  • Patent number: 7538024
    Abstract: A method for fabricating a dual-damascene copper structure includes providing a semiconductor substrate having a dielectric layer thereon and a dual-damascene hole positioned in the dielectric layer, wherein a portion of the semiconductor substrate is exposed in the dual-damascene hole. A PVD process and an atomic CVD process are sequentially performed to form a substrate-protecting layer and a tantalum nitride layer in the dual-damascene hole. And then a copper layer is formed in the dual-damascene hole.
    Type: Grant
    Filed: May 3, 2005
    Date of Patent: May 26, 2009
    Assignee: United Microelectronics Corp.
    Inventors: Hsien-Che Teng, Chin-Fu Lin, Meng-Chi Chen
  • Publication number: 20080026579
    Abstract: A copper damascene process includes providing a substrate having a dielectric layer thereon, forming at least a copper damascene structure in the dielectric layer, performing a heat treatment on the substrate, and performing a reduction plasma treatment on a surface of the copper damascene structure. The impurities formed in the copper damascene process are removed by the heat treatment, therefore the copper damascene structure is completely reduced by the reduction plasma treatment and is improved.
    Type: Application
    Filed: July 25, 2006
    Publication date: January 31, 2008
    Inventors: Kuo-Chih Lai, Mei-Ling Chen, Jei-Ming Chen, Hsin-Hsing Chen, Shih-Feng Su, Meng-Chi Chen
  • Publication number: 20060252250
    Abstract: A method for fabricating a dual-damascene copper structure includes providing a semiconductor substrate having a dielectric layer thereon and a dual-damascene hole positioned in the dielectric layer, wherein a portion of the semiconductor substrate is exposed in the dual-damascene hole. A PVD process and an atomic CVD process are sequentially performed to form a substrate-protecting layer and a tantalum nitride layer in the dual-damascene hole. And then a copper layer is formed in the dual-damascene hole.
    Type: Application
    Filed: May 3, 2005
    Publication date: November 9, 2006
    Inventors: Hsien-Che Teng, Chin-Fu Lin, Meng-Chi Chen