Patents by Inventor Meng How Chong

Meng How Chong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • SEMICONDUCTOR PACKAGE HAVING A DIE PAD AND AN ENCAPSULATION WITH TRENCHES AND METHOD FOR FABRICATING THE SAME
    Publication number: 20240387305
    Abstract: A semiconductor package includes: a die pad having opposing first and second sides and lateral sides connecting the first and second sides; at least one semiconductor die arranged over the first side; an encapsulation including a first dielectric material and encapsulating the semiconductor die, the second side of the die pad being at least partially exposed from the encapsulation; and a contiguous isolation structure including a second dielectric material different from the first dielectric material and covering the second side of the die pad. The encapsulation includes at least one first trench arranged along at least a part of a contour of the second side of the die pad. The second side of the die pad includes at least one second trench arranged along at least a part of the contour of the second side of the die pad. The trenches are filled by the contiguous isolation structure.
    Type: Application
    Filed: April 26, 2024
    Publication date: November 21, 2024
    Inventors: Meng How Chong, Muhammad Safie Rosli, Michael Reyes Godoy, Ke Yan Tean
  • Package lead design with grooves for improved dambar separation
    Patent number: 11362023
    Abstract: A lead frame includes a die pad, a first lead extending away from the die pad, a peripheral structure mechanically connected to the first lead and the die pad, and a first groove in an outer surface of the first lead. The first groove extends longitudinally along the first lead away from the die pad.
    Type: Grant
    Filed: July 12, 2019
    Date of Patent: June 14, 2022
    Assignee: Infineon Technologies AG
    Inventors: Jayaganasan Narayanasamy, Meng How Chong, Elmer Senorin Holgado, Chee Ming Lam, Sanjay Kumar Murugan, Arivindran Navaretnasinggam, Kai Yang Tan, Lee Shuang Wang
  • POWER SEMICONDUCTOR PACKAGE AND METHOD FOR FABRICATING A POWER SEMICONDUCTOR PACKAGE
    Publication number: 20220115245
    Abstract: A method for fabricating a power semiconductor package includes: providing a leadframe having a die pad and a frame, wherein the die pad is connected to the frame by at least one tie bar; attaching a semiconductor die to the die pad; laser cutting through the at least one tie bar, thereby forming a cut surface; and after the laser cutting, molding over the die pad and the semiconductor die, wherein the cut surface is completely covered by molding compound.
    Type: Application
    Filed: October 4, 2021
    Publication date: April 14, 2022
    Inventors: Jayaganasan Narayanasamy, Syahir Abd Hamid, Meng How Chong, Michael Reyes Godoy, Chee Ming Lam, Adbul Rahman Mohamed, Sanjay Kumar Murugan, Thomas Stoek
  • Package Lead Design with Grooves for Improved Dambar Separation
    Publication number: 20210013135
    Abstract: A lead frame includes a die pad, a first lead extending away from the die pad, a peripheral structure mechanically connected to the first lead and the die pad, and a first groove in an outer surface of the first lead. The first groove extends longitudinally along the first lead away from the die pad.
    Type: Application
    Filed: July 12, 2019
    Publication date: January 14, 2021
    Inventors: Jayaganasan Narayanasamy, Meng How Chong, Elmer Senorin Holgado, Chee Ming Lam, Sanjay Kumar Murugan, Arivindran Navaretnasinggam, Kai Yang Tan, Lee Shuang Wang