Patents by Inventor Meng-Hsuan Chan

Meng-Hsuan Chan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8962477
    Abstract: A method for modulating stress in films formed in semiconductor device manufacturing provides for high temperature annealing of an as-deposited compressive film such as titanium nitride. The high temperature annealing converts the initially compressive film to a tensile film without compromising other film qualities and characteristics. The converted tensile films are particularly advantageous as work function adjusting films in PMOS transistor devices and are advantageously used in conjunction with additional metal gate materials.
    Type: Grant
    Filed: August 12, 2011
    Date of Patent: February 24, 2015
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Meng-Hsuan Chan, Wei-Yang Lee, Da-Yuan Lee, Kuang-Yuan Hsu
  • Patent number: 8716785
    Abstract: A method includes providing a semiconductor substrate having a gate trench and depositing a metal layer, using a physical vapor deposition (PVD) process, over the substrate to partially fill the trench. The metal layer includes a bottom portion and a sidewall portion that is thinner than the bottom portion. The method also includes forming a coating layer on the metal layer, etching back the coating layer such that a portion of the coating layer protects a portion of the metal layer within the trench, and removing the unprotected portion of the metal layer. A different aspect involves a semiconductor device that includes a gate that includes a trench having a top surface, and a metal layer formed over the trench, wherein the metal layer includes a sidewall portion and a bottom portion, and wherein the sidewall portion is thinner than the bottom portion.
    Type: Grant
    Filed: May 8, 2012
    Date of Patent: May 6, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Peng-Soon Lim, Meng-Hsuan Chan, Kuang-Yuan Hsu
  • Patent number: 8530294
    Abstract: The present disclosure provides a method of semiconductor device fabrication including removing a sacrificial gate structure formed on a substrate to provide an opening. A metal gate structure is then formed in the opening. The forming of the metal gate structure includes forming a first layer (including metal) on a gate dielectric layer, wherein the first layer includes a metal and performing a stress modulation process on the first layer. The stress modulation process may include ion implantation of a neutral species such as silicon, argon, germanium, and xenon.
    Type: Grant
    Filed: October 21, 2011
    Date of Patent: September 10, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Yang Lee, Meng-Hsuan Chan, Huang Ching Yu, Da-Yuan Lee, Kuang-Yuan Hsu
  • Publication number: 20130102142
    Abstract: The present disclosure provides a method of semiconductor device fabrication including removing a sacrificial gate structure formed on a substrate to provide an opening. A metal gate structure is then formed in the opening. The forming of the metal gate structure includes forming a first layer (including metal) on a gate dielectric layer, wherein the first layer includes a metal and performing a stress modulation process on the first layer. The stress modulation process may include ion implantation of a neutral species such as silicon, argon, germanium, and xenon.
    Type: Application
    Filed: October 21, 2011
    Publication date: April 25, 2013
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd., ("TSMC")
    Inventors: Wei-Yang Lee, Meng-Hsuan Chan, Huang Ching Yu, Da-Yuan Lee, Kuang-Yuan Hsu
  • Publication number: 20130040455
    Abstract: A method for modulating stress in films formed in semiconductor device manufacturing provides for high temperature annealing of an as-deposited compressive film such as titanium nitride. The high temperature annealing converts the initially compressive film to a tensile film without compromising other film qualities and characteristics. The converted tensile films are particularly advantageous as work function adjusting films in PMOS transistor devices and are advantageously used in conjunction with additional metal gate materials.
    Type: Application
    Filed: August 12, 2011
    Publication date: February 14, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Meng-Hsuan CHAN, Wei-Yang LEE, Da-Yuan LEE, Kuang-Yuan HSU
  • Publication number: 20120217578
    Abstract: A method includes providing a semiconductor substrate having a gate trench and depositing a metal layer, using a physical vapor deposition (PVD) process, over the substrate to partially fill the trench. The metal layer includes a bottom portion and a sidewall portion that is thinner than the bottom portion. The method also includes forming a coating layer on the metal layer, etching back the coating layer such that a portion of the coating layer protects a portion of the metal layer within the trench, and removing the unprotected portion of the metal layer. A different aspect involves a semiconductor device that includes a gate that includes a trench having a top surface, and a metal layer formed over the trench, wherein the metal layer includes a sidewall portion and a bottom portion, and wherein the sidewall portion is thinner than the bottom portion.
    Type: Application
    Filed: May 8, 2012
    Publication date: August 30, 2012
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Peng-Soon Lim, Meng-Hsuan Chan, Kuang-Yuan Hsu
  • Patent number: 8193081
    Abstract: A method includes providing a semiconductor substrate having a gate trench and depositing a metal layer, using a physical vapor deposition (PVD) process, over the substrate to partially fill the trench. The metal layer includes a bottom portion and a sidewall portion that is thinner than the bottom portion. The method also includes forming a coating layer on the metal layer, etching back the coating layer such that a portion of the coating layer protects a portion of the metal layer within the trench, and removing the unprotected portion of the metal layer. A different aspect involves a semiconductor device that includes a gate that includes a trench having a top surface, and a metal layer formed over the trench, wherein the metal layer includes a sidewall portion and a bottom portion, and wherein the sidewall portion is thinner than the bottom portion.
    Type: Grant
    Filed: October 20, 2009
    Date of Patent: June 5, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Peng-Soon Lim, Meng-Hsuan Chan, Kuang-Yuan Hsu
  • Publication number: 20110089484
    Abstract: A method includes providing a semiconductor substrate having a gate trench and depositing a metal layer, using a physical vapor deposition (PVD) process, over the substrate to partially fill the trench. The metal layer includes a bottom portion and a sidewall portion that is thinner than the bottom portion. The method also includes forming a coating layer on the metal layer, etching back the coating layer such that a portion of the coating layer protects a portion of the metal layer within the trench, and removing the unprotected portion of the metal layer. A different aspect involves a semiconductor device that includes a gate that includes a trench having a top surface, and a metal layer formed over the trench, wherein the metal layer includes a sidewall portion and a bottom portion, and wherein the sidewall portion is thinner than the bottom portion.
    Type: Application
    Filed: October 20, 2009
    Publication date: April 21, 2011
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Peng-Soon Lim, Meng-Hsuan Chan, Kuang-Yuan Hsu