Abstract: The present disclosure provides methods for determining a focus spot window of a wafer and judging whether the wafer needs to be reworked, belonging to the field of semiconductor technology. The method for determining a focus spot window of a wafer includes: acquiring flatness information and location information of a local region of the wafer before exposure; acquiring distribution information of abnormal dies, process information corresponding to the abnormal dies, and data information related to wafer yield; and determining the focus spot window corresponding to a process according to the flatness information and the location information of the local region of the wafer, the distribution information of the abnormal dies, the process information corresponding to the abnormal dies, and the data information related to wafer yield.

Abstract: A light-transmitting antenna includes a substrate, a first and a second conductive pattern. The first and the second conductive pattern is disposed on a first and a second surface of the substrate respectively. The first conductive pattern includes a first feeder unit, a first and a second radiation unit, a first and a second coupling unit and a first parasitic unit. The first feeder unit is connected to the second radiation unit. The first and the second radiation unit are located between the first and the second coupling unit. One side and the other side of the first parasitic unit is connected to the second coupling unit and adjacent to the first coupling unit respectively. The second conductive pattern includes a second feeder unit, a third coupling unit, a second parasitic unit, and a fourth coupling unit.

Abstract: A light-transmitting antenna includes a substrate, a first conductive pattern, and a second conductive pattern. The first conductive pattern has a first feeder unit, a first radiation unit, a second radiation unit, and a first connection unit. The first feeder unit and the first connection unit are connected to two sides of the first radiation unit. The first connection unit connects the first radiation unit and the second radiation unit. The second conductive pattern has a second feeder unit, a third radiation unit, a fourth radiation unit, and a second connection unit. The second feeder unit and the second connection unit are connected to two sides of the third radiation unit. The second connection unit connects the third radiation unit and the fourth radiation unit. An orthogonal projection of the second feeder unit on a first surface of the substrate at least partially overlaps the first feeder unit.

Abstract: A method for monitoring flatness of a wafer table includes: acquiring a yield and original focus data of a wafer in real time; obtaining an edge flatness curve of a wafer table based on the original focus data; obtaining a yield curve of the wafer based on the yield of the wafer; obtaining a trend diagram of the edge flatness and the yield over time based on the edge flatness curve and the yield curve; and determining, based on the trend diagram, an edge flatness value of the wafer table when the wafer table is replaced.

Abstract: The present disclosure provides methods for determining a focus spot window of a wafer and judging whether the wafer needs to be reworked, belonging to the field of semiconductor technology. The method for determining a focus spot window of a wafer includes: acquiring flatness information and location information of a local region of the wafer before exposure; acquiring distribution information of abnormal dies, process information corresponding to the abnormal dies, and data information related to wafer yield; and determining the focus spot window corresponding to a process according to the flatness information and the location information of the local region of the wafer, the distribution information of the abnormal dies, the process information corresponding to the abnormal dies, and the data information related to wafer yield.

Abstract: Provided are a wafer defect analysis method and system, a device and a medium. The wafer defect analysis method includes: acquiring batch information and defect information of each wafer in a semiconductor manufacturing process, the defect information including hot spot defect information; setting a hot spot defect feature, and selecting target hot spot defect information associated with the hot spot defect feature from the hot spot defect information; tracking, according to the batch information, a first wafer corresponding to the target hot spot defect information associated with the hot spot defect feature, and determining a defect source.

Abstract: A semiconductor device includes a substrate, a buffer layer disposed on the substrate, a barrier layer disposed on the buffer layer, a source, a drain, and a gate stack. The source, the drain, and the gate stack are disposed on the barrier layer. The gate stack includes a first epitaxial layer on the barrier layer, a second epitaxial layer on the first epitaxial layer, and a third epitaxial layer on the second epitaxial layer. The semiconductor device further includes a gate disposed on the gate stack.

Abstract: When a power conversion unit is in a working mode, the power conversion unit converts an alternating current power from an alternating current power supply apparatus into a direct current power. Then, the power conversion unit sends a power starting signal to a first switch control unit. After the first switch control unit receives the power starting signal, the first switch control unit turns on a first switch unit, so that an overall capacitor impedance formed by a first capacitor and a second capacitor is smaller than a first capacitor impedance formed by the first capacitor. When the power conversion unit is not in the working mode, the first switch control unit turns off the first switch unit, so that the overall capacitor impedance is equal to the first capacitor impedance.

Abstract: When a power conversion unit is in a working mode, the power conversion unit converts an alternating current power from an alternating current power supply apparatus into a direct current power. Then, the power conversion unit sends a power starting signal to a first switch control unit. After the first switch control unit receives the power starting signal, the first switch control unit turns on a first switch unit, so that an overall capacitor impedance formed by a first capacitor and a second capacitor is smaller than a first capacitor impedance formed by the first capacitor. When the power conversion unit is not in the working mode, the first switch control unit turns off the first switch unit, so that the overall capacitor impedance is equal to the first capacitor impedance.