Abstract: A black matte polyimide film is provided, the black matte polyimide film includes polyimide, carbon black and polyimide fine powder. The polyimide component is obtained by polymerization of a dianhydride and a diamine, followed by chemical cyclization, in which the dianhydride is pyromellitic dianhydride, and the diamine comprises 5˜15 mol % of p-phenylenediamine and 95˜85 mol % of 4,4?-diaminodiphenyl ether; the carbon black is present in an amount of 2 to 8 wt % of the polyimide film; and the polyimide fine powder is present in an amount of 5 to 10 wt % of the polyimide film, such that the black matte polyimide film has a glossiness between 5 and 30 and a thermal expansion coefficient of less than 41 ppm/° C.

Abstract: A memory test array and a test method thereof are provided. The memory test array includes a first memory array, a second memory array, and a plurality of first common conductive pads. The first memory array includes a plurality of first bit lines and a plurality of first word lines. The second memory array is adjacent to the first memory array and includes a plurality of second bit lines and a plurality of second word lines. Each of the first common conductive pads has a first end and a second end, and the first ends and the second ends are respectively coupled to the first bit lines and the second bit lines, or respectively coupled to the first word lines and the second word lines. The memory test array of the present disclosure can effectively save the area of the memory test chip and make the test process more efficient.

Abstract: A memory test array and a test method thereof are provided. The memory test array includes a first memory array, a second memory array, and a plurality of first common conductive pads. The first memory array includes a plurality of first bit lines and a plurality of first word lines. The second memory array is adjacent to the first memory array and includes a plurality of second bit lines and a plurality of second word lines. Each of the first common conductive pads has a first end and a second end, and the first ends and the second ends are respectively coupled to the first bit lines and the second bit lines, or respectively coupled to the first word lines and the second word lines. The memory test array of the present disclosure can effectively save the area of the memory test chip and make the test process more efficient.

Abstract: An assembly of a chip antenna and a circuit board includes a chip antenna and a circuit board. The circuit board includes a ground layer. The ground layer includes a hollow region formed adjacent to a periphery of the ground layer. The hollow region of the ground layer can be used for configuring an input impedance of the circuit board. The chip antenna is disposed in the hollow region of the ground layer, electrically connecting to the ground layer. The chip antenna includes input impedance. The input impedance of the chip antenna is adjustable to achieve a conjugate impedance match between the chip antenna and the circuit board such that the circuit board and the chip antenna can simultaneously radiate electromagnetic energy.

Abstract: A loop antenna for communication is provided, which includes a microwave substrate, being a hexahedron; a first conductive layer, disposed on an upper surface of the substrate for forming a first loop; a second conductive layer, disposed on a first side surface of the substrate, and electrically connected to a feed-in point and a ground point; and a third conductive layer, disposed on a lower surface of the substrate for forming a second loop. The first conductive layer and the second conductive layer are electrically connected at the junction between the upper surface and the first side surface, and the second conductive layer and the third conductive layer are electrically connected at the junction between the first side surface and the lower surface. The antenna also has an appropriate bandwidth for wireless communication application.

Abstract: An assembly of a chip antenna and a circuit board includes a chip antenna and a circuit board. The circuit board includes a ground layer. The ground layer includes a hollow region formed adjacent to a periphery of the ground layer. The hollow region of the ground layer can be used for configuring an input impedance of the circuit board. The chip antenna is disposed in the hollow region of the ground layer, electrically connecting to the ground layer. The chip antenna includes input impedance. The input impedance of the chip antenna is adjustable to achieve a conjugate impedance match between the chip antenna and the circuit board such that the circuit board and the chip antenna can simultaneously radiate electromagnetic energy.

Abstract: A loop antenna for communication is provided, which includes a microwave substrate, being a hexahedron; a first conductive layer, disposed on an upper surface of the substrate for forming a first loop; a second conductive layer, disposed on a first side surface of the substrate, and electrically connected to a feed-in point and a ground point; and a third conductive layer, disposed on a lower surface of the substrate for forming a second loop. The first conductive layer and the second conductive layer are electrically connected at the junction between the upper surface and the first side surface, and the second conductive layer and the third conductive layer are electrically connected at the junction between the first side surface and the lower surface. The antenna also has an appropriate bandwidth for wireless communication application.