Patents by Inventor Meng-Hsun Hsieh

Meng-Hsun Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250089258
    Abstract: A manufacturing method of a memory device may be applied to a three-dimensional NAND memory device with high capacity and high performance. In a manufacturing process of the three-dimensional NAND memory device, a material of a control gate (word line) is tungsten. The forming method of a tungsten layer includes nucleation and bulk formation performed. In at least one of the nucleation and the bulk formation, hydrogen flow is between 1000 and 20000 sccm. At least one time of soak with nitrogen may also be performed after the nucleation. A tungsten grain size in the tungsten layer is 70 nm or more.
    Type: Application
    Filed: September 12, 2023
    Publication date: March 13, 2025
    Applicant: MACRONIX International Co., Ltd.
    Inventors: Meng-Hsun Hsieh, Tuung Luoh, Kuang-Wei Chen, Kuang-Chao Chen, Ta-Hung Yang
  • Patent number: 8614926
    Abstract: A memory apparatus includes a plurality of first bit columns for constructing a common memory space and at least one reserve second bit column. A column address of a damaged first bit column is recorded as a predetermined column address. When a byte column is accessed, data recorded in the first bit columns and the second bit columns are respectively latched in a first latching device and a second latching device. In the event that the latched access data is accessed, data is outputted by comparing the predetermined column address of each first bit column and an access column address, and when the access column address matches with the predetermined column address, data is outputted via the second latching device; otherwise, the data is outputted via the first latching device.
    Type: Grant
    Filed: December 30, 2010
    Date of Patent: December 24, 2013
    Assignee: MStar Semiconductor, Inc.
    Inventors: Wen Pin Hsieh, Meng Hsun Hsieh
  • Patent number: 8149232
    Abstract: Systems and methods for generating reference voltages are provided. A representative system comprises a resistor circuit; a first switch coupled between a first end of the resistor circuit and a first power source; a second switch coupled between the first end of the resistor circuit and a second power source; a third switch coupled to a second end of the resistor circuit; a fourth switch coupled to the second end of the resistor circuit; a first resistor coupled between the first end of the resistor circuit and the first switch; a second resistor coupled between the first end of the resistor circuit and the second switch; a third resistor coupled between the second end of the resistor circuit and the third switch; a fourth resistor coupled between the second end of the resistor circuit and the fourth switch; and a control circuit for controlling the switches.
    Type: Grant
    Filed: January 15, 2010
    Date of Patent: April 3, 2012
    Assignee: Chimei Innolux Corporation
    Inventors: Ching-Wei Lin, Chueh-Kuei Jan, Meng-Hsun Hsieh
  • Patent number: 8115727
    Abstract: Systems for displaying images are provided. A representative system incorporates a digital data sampling circuit with N stage data inputs. The first stage flip-flop outputs a first output signal. The second stage flip-flop outputs a second output signal. The first stage sample latch circuit receives digital data according to a first control signal. The first stage logic circuit comprises a first converter for inverting the second output signal and generating a first inverse logic signal, and generates the first control signal according to the first output signal and the first inverse logic signal.
    Type: Grant
    Filed: May 25, 2006
    Date of Patent: February 14, 2012
    Assignee: Chimei Innolux Corporation
    Inventors: Chueh-Kuei Jan, Ching-Wei Lin, Meng-Hsun Hsieh
  • Publication number: 20110292741
    Abstract: A memory apparatus includes a plurality of first bit columns for constructing a common memory space and at least one reserve second bit column. A column address of a damaged first bit column is recorded as a predetermined column address. When a byte column is accessed, data recorded in the first bit columns and the second bit columns are respectively latched in a first latching device and a second latching device. In the event that the latched access data is accessed, data is outputted by comparing the predetermined column address of each first bit column and an access column address, and when the access column address matches with the predetermined column address, data is outputted via the second latching device; otherwise, the data is outputted via the first latching device.
    Type: Application
    Filed: December 30, 2010
    Publication date: December 1, 2011
    Applicant: MStar Semiconductor, Inc.
    Inventors: Wen-Pin Hsieh, Meng Hsun Hsieh
  • Publication number: 20100110060
    Abstract: Systems and methods for generating reference voltages are provided. A representative system comprises a resistor circuit; a first switch coupled between a first end of the resistor circuit and a first power source; a second switch coupled between the first end of the resistor circuit and a second power source; a third switch coupled to a second end of the resistor circuit; a fourth switch coupled to the second end of the resistor circuit; a first resistor coupled between the first end of the resistor circuit and the first switch; a second resistor coupled between the first end of the resistor circuit and the second switch; a third resistor coupled between the second end of the resistor circuit and the third switch; a fourth resistor coupled between the second end of the resistor circuit and the fourth switch; and a control circuit for controlling the switches.
    Type: Application
    Filed: January 15, 2010
    Publication date: May 6, 2010
    Inventors: Ching-Wei Lin, Chueh-Kuei Jan, Meng-Hsun Hsieh
  • Patent number: 7675352
    Abstract: Systems and methods for generating reference voltages are provided. A representative system comprises a resistor circuit; a first switch coupled between a first end of the resistor circuit and a first power source; a second switch coupled between the first end of the resistor circuit and a second power source; a third switch coupled to a second end of the resistor circuit; a fourth switch coupled to the second end of the resistor circuit; a first resistor coupled between the first end of the resistor circuit and the first switch; a second resistor coupled between the first end of the resistor circuit and the second switch; a third resistor coupled between the second end of the resistor circuit and the third switch; a fourth resistor coupled between the second end of the resistor circuit and the fourth switch; and a control circuit for controlling the switches.
    Type: Grant
    Filed: September 7, 2005
    Date of Patent: March 9, 2010
    Assignee: TPO Displays Corp.
    Inventors: Ching-Wei Lin, Chueh-Kuei Jan, Meng-Hsun Hsieh
  • Publication number: 20080232230
    Abstract: A joining structure of a disc medium and a multifunctional card, the main feature of which is to provide a multifunctional card adhered to one side of a disc medium, wherein the multifunctional card having a hole with a diameter no less than that of a mounting hole of the disc medium. Besides, after the disc medium and the multifunctional card are joined, the thickness of the joining structure is 0.7-1.2 mm, so that it can be carry-on and has no influence on the playing of the disc medium in a disc medium player.
    Type: Application
    Filed: March 23, 2007
    Publication date: September 25, 2008
    Inventor: Meng-Hsun Hsieh
  • Publication number: 20070273618
    Abstract: A pixel providing voltage compensation and comprising a compensation device, a first switch element, a driving transistor, and a display element. The compensation device generates a compensation voltage during a first period. The first switch element transfers a data signal during a second period following the first period. The driving transistor operates in a reverse-bias mode during the first period. The driving transistor operates in a forward-bias mode during the second period to generate a driving current according to the compensation voltage and the data signal. The display element emits light according to the driving current.
    Type: Application
    Filed: May 26, 2006
    Publication date: November 29, 2007
    Applicant: TOPPOLY OPTOELECTRONICS CORP.
    Inventors: Meng-Hsun Hsieh, Du-Zen Peng
  • Publication number: 20070273636
    Abstract: Systems for displaying images are provided. A representative system incorporates a digital data sampling circuit with N stage data inputs. The first stage flip-flop outputs a first output signal. The second stage flip-flop outputs a second output signal. The first stage sample latch circuit receives digital data according to a first control signal. The first stage logic circuit comprises a first converter for inverting the second output signal and generating a first inverse logic signal, and generates the first control signal according to the first output signal and the first inverse logic signal.
    Type: Application
    Filed: May 25, 2006
    Publication date: November 29, 2007
    Applicant: TOPPOLY OPTOELECTRONICS CORP.
    Inventors: Chueh-Kuei Jan, Ching-Wei Lin, Meng-Hsun Hsieh
  • Patent number: 7221194
    Abstract: Analog buffers with a precise gate to source voltage compensation and a small DC offset, by storing an input offset voltage to be used as an output offset voltage to reverse the offset in the input. A first source follower at the input end and a second source follower at the output end are both coupled to a switching circuit, wherein the first follower provides an input offset voltage (e.g., |Vgsp|) based on the input voltage (Vin), the second source follower provides an output voltage (Vout) by compensating Vin transmitted through the analog buffer circuit with an output offset voltage (|Vgsn|), and the switching circuit stores and equalizes the output offset voltage to the input offset voltage (|Vgsp|=|Vgsn|), so to obtain an output Vout that is identical to Vin.
    Type: Grant
    Filed: February 18, 2005
    Date of Patent: May 22, 2007
    Assignee: TPO Displays Corp.
    Inventors: Ching-Wei Lin, Chueh-Kuei Jan, Meng-Hsun Hsieh
  • Publication number: 20070052472
    Abstract: Systems and methods for generating reference voltages are provided. A representative system comprises a resistor circuit; a first switch coupled between a first end of the resistor circuit and a first power source; a second switch coupled between the first end of the resistor circuit and a second power source; a third switch coupled to a second end of the resistor circuit; a fourth switch coupled to the second end of the resistor circuit; a first resistor coupled between the first end of the resistor circuit and the first switch; a second resistor coupled between the first end of the resistor circuit and the second switch; a third resistor coupled between the second end of the resistor circuit and the third switch; a fourth resistor coupled between the second end of the resistor circuit and the fourth switch; and a control circuit for controlling the switches.
    Type: Application
    Filed: September 7, 2005
    Publication date: March 8, 2007
    Inventors: Ching-Wei Lin, Chueh-Kuei Jan, Meng-Hsun Hsieh
  • Patent number: 7158065
    Abstract: Signal driving circuits with high driving capability and precise analog output voltage level, by outputting analog voltages through analog buffers and directly outputting voltages from digital-to-analog converters in turn. A digital-to-analog converter generates a first analog voltage according to digital data. An output circuit selectively either outputs a second analog voltage according to the first analog voltage by an analog buffer to a load or outputs the first analog voltage to the load directly.
    Type: Grant
    Filed: August 30, 2005
    Date of Patent: January 2, 2007
    Assignee: TPO Displays Corp.
    Inventors: Ching-Wei Lin, Chueh-Kuei Jan, Meng-Hsun Hsieh
  • Publication number: 20060186932
    Abstract: Analog buffers with a precise gate to source voltage compensation and a small DC offset, by storing an input offset voltage to be used as an output offset voltage to reverse the offset in the input. A first source follower at the input end and a second source follower at the output end are both coupled to a switching circuit, wherein the first follower provides an input offset voltage (e.g., |Vgsp|) based on the input voltage (Vin), the second source follower provides an output voltage (Vout) by compensating Vin transmitted through the analog buffer circuit with an output offset voltage (|Vgsn|), and the switching circuit stores and equalizes the output offset voltage to the input offset voltage (|Vgsp|=|Vgsn|), so to obtain an output Vout that is identical to Vin.
    Type: Application
    Filed: February 18, 2005
    Publication date: August 24, 2006
    Inventors: Ching-Wei Lin, Chueh-Kuei Jan, Meng-Hsun Hsieh
  • Publication number: 20060176200
    Abstract: Signal driving circuits with high driving capability and precise analog output voltage level, by outputting analog voltages through analog buffers and directly outputting voltages from digital-to-analog converters in turn. A digital-to-analog converter generates a first analog voltage according to digital data. An output circuit selectively either outputs a second analog voltage according to the first analog voltage by an analog buffer to a load or outputs the first analog voltage to the load directly.
    Type: Application
    Filed: August 30, 2005
    Publication date: August 10, 2006
    Inventors: Ching-Wei Lin, Chueh-Kuei Jan, Meng-Hsun Hsieh
  • Patent number: 7045258
    Abstract: A color filter comprising first filtering units, second filtering units, and third filtering units is provided. The first filtering unit is manufactured according to a number of first pattern of a first mask, wherein each of the first patterns comprises a first main pattern portion and a number of first compensating portions. The second filtering unit is manufactured according to a number of second patterns of the second mask. The first compensating portions enable each first filtering unit to be smoothly coupled with the adjacent second filtering unit.
    Type: Grant
    Filed: June 9, 2005
    Date of Patent: May 16, 2006
    Assignee: Himax Technologies Inc.
    Inventors: Wei-Hsiao Chen, Meng-Hsun Hsieh
  • Publication number: 20060055857
    Abstract: A method for reducing fringe effect of a liquid crystal on silicon (LCOS) display panel is disclosed. The method includes the steps of providing a semiconductor substrate having a plurality of first electrodes and a second electrode disposed between two of the first electrodes, forming a patterned first photoresist layer on the second electrode, conformally forming a passivation layer on the first electrodes and a part of the semiconductor substrate, removing the first photoresist layer, forming a patterned second photoresist layer on the passivation layer, and forming an anti-reflection coating (ARC) layer on the second electrode.
    Type: Application
    Filed: September 14, 2004
    Publication date: March 16, 2006
    Inventors: Meng-Hsun Hsieh, Bing-Jei Liao
  • Patent number: 6998814
    Abstract: A method for measuring the electromotive force of motors is provided. The method enables the motor to rotate in single phase mode, and thereby measures the electromotive force constant of the motor. According to the principles and the method, motors do not have to work in close-loop. Neither encoders for detecting angle displacement or angle velocity are needed for motors, nor the motor impedance or current have to obtain in advance. Compared with the prior art, the disclosed method is more efficiency and economic.
    Type: Grant
    Filed: April 16, 2004
    Date of Patent: February 14, 2006
    Assignee: Industrial Technology Research Institute
    Inventors: Shyh-Jier Wang, Shir-Kuan Lin, Meng-Hsun Hsieh
  • Publication number: 20050284393
    Abstract: A color filter comprising first filtering units, second filtering units, and third filtering units is provided. The first filtering unit is manufactured according to a number of first pattern of a first mask, wherein each of the first patterns comprises a first main pattern portion and a number of first compensating portions. The second filtering unit is manufactured according to a number of second patterns of the second mask. The first compensating portions enable each first filtering unit to be smoothly coupled with the adjacent second filtering unit.
    Type: Application
    Filed: June 9, 2005
    Publication date: December 29, 2005
    Inventors: Wei-Hsiao Chen, Meng-Hsun Hsieh
  • Publication number: 20050140318
    Abstract: A method for measuring the electromotive force of motors is provided. The method enables the motor to rotate in single phase mode, and thereby measures the electromotive force constant of the motor. According to the principles and the method, motors do not have to work in close-loop. Neither encoders for detecting angle displacement or angle velocity are needed for motors, nor the motor impedance or current have to obtain in advance. Compared with the prior art, the disclosed method is more efficiency and economic.
    Type: Application
    Filed: April 16, 2004
    Publication date: June 30, 2005
    Inventors: Shyh-Jier Wang, Shir-Kuan Lin, Meng-Hsun Hsieh