Abstract: A ferroelectric field effect transistor (FeFET) device includes a semiconductor substrate and a 3D transistor. The 3D transistor includes drain and source electrodes; a channel structure that includes a channel body and a gate dielectric layer; and a gate electrode that is disposed on the gate dielectric layer and that is electrically isolated from the drain and source electrodes. The channel body is disposed between and connected to the drain and source electrodes. The gate dielectric layer covers the channel body, is made of crystalline hafnium zirconium oxide, and has a thickness ranging from 2 nm to 5 nm. The FeFET device has an on/off current ratio that is greater than 5×104.

Abstract: A ferroelectric field effect transistor (FeFET) device includes a semiconductor substrate and a 3D transistor. The 3D transistor includes drain and source electrodes; a channel structure that includes a channel body and a gate dielectric layer; and a gate electrode that is disposed on the gate dielectric layer and that is electrically isolated from the drain and source electrodes. The channel body is disposed between and connected to the drain and source electrodes. The gate dielectric layer covers the channel body, is made of crystalline hafnium zirconium oxide, and has a thickness ranging from 2 nm to 5 nm. The FeFET device has an on/off current ratio that is greater than 5×104.

Abstract: The invention provides a pH-sensitive linker that can simultaneously bind metallic nanoparticles and one or more agents with various molecular size. The linker of the invention can deliver the agents into cells involved in disease processes or close to cells so that the agents can selectively target and effect on the cells. The target delivery provided by the linker of the invention can be used for example for disease sensing, imaging, drug delivery, and therapy.

Abstract: A switch card and a server are provided. The switch card is adapted to couple a riser card and a hard drive array, and includes a storage device, a processing circuit, a first connection portion, and a plurality of first sub-connection portions. When the first connection portion is coupled to the riser card, the processing circuit receives a setting signal of the riser card via the first connection portion. The processing circuit reads a configuration table stored in the storage device according to the setting signal. When the first sub-connection portions are coupled to a plurality of second sub-connection portions of the hard drive array, the second sub-connection portions are coupled to a plurality of hard drives of the hard drive array via a plurality of first cables. The processing circuit determines a configuration setting between the first cables and the hard drives according to the configuration table.

Abstract: Provided is a vaccine combination against multiple dengue virus serotypes and preparation thereof. The vaccine combination includes a first vaccine and a second vaccine, wherein the first vaccine includes a live-attenuated dengue virus and a live-attenuated chimeric dengue virus, and the second vaccine includes a plurality type of recombinant flagellin and envelope domain III fusion proteins, wherein an envelope domain III of each type of the recombinant flagellin and envelope domain III fusion proteins is derived from a different dengue virus serotype. Also provided is a method of preventing or treating viral infection by multiple dengue virus serotypes in a subject using the vaccine combination, including the steps of administering the first and then the second vaccines at a time interval of about 1-5 weeks.

Abstract: The invention provides a pH-sensitive linker that can simultaneously bind metallic nanoparticles and one or more agents with various molecular size. The linker of the invention can deliver the agents into cells involved in disease processes or close to cells so that the agents can selectively target and effect on the cells. The target delivery provided by the linker of the invention can be used for example for disease sensing, imaging, drug delivery, and therapy.

Abstract: A fusion protein comprising an antigen-presenting cell (APC)-binding domain or a CD91 receptor-binding domain, a translocation peptide, a fusion antigen, an endoplasmic reticulum retention sequence, and optionally a nuclear export signal is disclosed. The fusion antigen comprises a porcine reproductive and respiratory syndrome virus (PRRSV) ORF7 antigen, a PRRSV ORF1b antigen, a PRRSV ORF6 antigen, and a PRRSV ORF5 antigen. The fusion protein is useful for inducing antigen-specific cell-mediated and humoral responses.

Abstract: Provided is a vaccine combination against multiple dengue virus serotypes and preparation thereof. The vaccine combination includes a first vaccine and a second vaccine, wherein the first vaccine includes a live-attenuated dengue virus and a live-attenuated chimeric dengue virus, and the second vaccine includes a plurality type of recombinant flagellin and envelope domain III fusion proteins, wherein an envelope domain III of each type of the recombinant flagellin and envelope domain III fusion proteins is derived from a different dengue virus serotype. Also provided is a method of preventing or treating viral infection by multiple dengue virus serotypes in a subject using the vaccine combination, including the steps of administering the first and then the second vaccines at a time interval of about 1-5 weeks.

Abstract: A fusion protein comprising an antigen-presenting cell (APC)-binding domain or a CD91 receptor-binding domain, a translocation peptide, a fusion antigen, an endoplasmic reticulum retention sequence, and optionally a nuclear export signal is disclosed. The fusion antigen comprises a porcine reproductive and respiratory syndrome virus (PRRSV) ORF7 antigen, a PRRSV ORF1b antigen, a PRRSV ORF6 antigen, and a PRRSV ORF5 antigen. The fusion protein is useful for inducing antigen-specific cell-mediated and humoral responses.

Abstract: Disclosed is a smart home control apparatus, including: a network input port, used for connecting a wired network and converting to a wireless network signal through a wireless network conversion technology; a receiving unit, receiving an instruction sent from an external apparatus through the wireless network signal; a signal conversion unit, converting the instruction received by the receiving unit to a corresponding instruction according to a communication protocol of a target apparatus; and a sending unit, sending the corresponding instruction to a controller electrically connected with the target apparatus, wherein the controller stores a status of the target apparatus into a storage unit after receiving the corresponding instruction and changing a status of the target apparatus.

Abstract: A pixel circuit is provided. The pixel circuit is electrically coupled to a data line, a first scan line, and a second scan line. The pixel circuit includes a first pixel unit, a second pixel unit, and a third pixel unit. The first pixel unit is electrically coupled to the data line and the second scan line, to determine a first displayed gray scale of the first pixel unit. The second pixel unit is electrically coupled to the data line and the first scan line, to determine a second displayed gray scale of the second pixel unit. The third pixel unit is electrically coupled to the data line, the first scan line, and the second scan line, to determine a third displayed gray scale of the third pixel unit.

Abstract: A liquid crystal display includes a date line for transmitting a data signal, a first gate line for transmitting a first gate signal, a second gate line for transmitting a second gate signal, a first sub-pixel unit for being written to by a first sub-pixel voltage according to the data signal and the first gate signal, a second sub-pixel unit for being written to by a second sub-pixel voltage according to the data signal and the first gate signal, a third sub-pixel unit for being written to by a third sub-pixel voltage according to the data signal and the first gate signal, and a charge sharing control unit. The charge sharing control unit is utilized for controlling a charge sharing operation over the first and third sub-pixel units according to the second gate signal, thereby adjusting the first and third sub-pixel voltages.

Abstract: A driving method of a display panel is described. A display panel including a pixel array is provided. The pixel array includes N scan lines, M data lines, and a plurality of first pixel units and a plurality of second pixel units electrically connected to the scan lines and the data lines. When an image is displayed with a wide-viewing angle mode, a first scanning procedure is performed to sequentially scan the first scan line of the scan lines to the Nth scan line of the scan lines in order. When the image is displayed with a narrow-viewing angle mode, the second scanning procedure is performed to sequentially scan the Nth scan line of the scan lines to the first scan line of the scan lines in order.

Abstract: Pixel structural designs on a display panel are disclosed. Each pixel on the display panel includes a plurality of sub-pixels. The sub-pixels are arranged sequentially along a vertical direction and used for displaying different colors in a circle. The display panel in the disclosure can be switched between a two-dimensional mode and a three-dimensional mode. In the three-dimensional mode, parts of the sub-pixels are disabled for forming a shielding area. Other adjacent sub-pixels form a pixel displaying unit.

Abstract: A pixel includes sub-pixels each of which includes a first display region, a second display region, a third display region, a first capacitor, and a second capacitor. The first capacitor connects the second display region with the third display region. The second capacitor connects the first display region to the third display region via a switch. When the switch is activated, the potential of the third display region is decreased via the second capacitor, the potential of the first display region is increased via the second capacitor, and the potential of the second display region is decreased via the first capacitor. A display panel and driving method in a display panel are also disclosed herein.

Abstract: An array substrate and a pixel unit of a display panel include a plurality of subpixels arranged in a pixel array (N row*M column). Only one data line is disposed in a portion of two adjacent columns of subpixels in the pixel array, and two data lines are disposed in another portion of two adjacent columns of subpixels in the pixel array.

Abstract: An array substrate and a pixel unit of a display panel include a plurality of subpixels arranged in a pixel array (N row*M column). Only one data line is disposed in a portion of two adjacent columns of subpixels in the pixel array, and two data lines are disposed in another portion of two adjacent columns of subpixels in the pixel array.

Abstract: A pixel circuit is provided. The pixel circuit is electrically coupled to a data line, a first scan line, and a second scan line. The pixel circuit includes a first pixel unit, a second pixel unit, and a third pixel unit. The first pixel unit is electrically coupled to the data line and the second scan line, to determine a first displayed gray scale of the first pixel unit. The second pixel unit is electrically coupled to the data line and the first scan line, to determine a second displayed gray scale of the second pixel unit. The third pixel unit is electrically coupled to the data line, the first scan line, and the second scan line, to determine a third displayed gray scale of the third pixel unit.

Abstract: A pixel includes sub-pixels each of which includes a first display region, a second display region, a third display region, a first capacitor, and a second capacitor. The first capacitor connects the second display region with the third display region. The second capacitor connects the first display region to the third display region via a switch. When the switch is activated, the potential of the third display region is decreased via the second capacitor, the potential of the first display region is increased via the second capacitor, and the potential of the second display region is decreased via the first capacitor. A display panel and driving method in a display panel are also disclosed herein.

Abstract: A driving method of a display panel is described. A display panel including a pixel array is provided. The pixel array includes N scan lines, M data lines, and a plurality of first pixel units and a plurality of second pixel units electrically connected to the scan lines and the data lines. When an image is displayed with a wide-viewing angle mode, a first scanning procedure is performed to sequentially scan the first scan line of the scan lines to the Nth scan line of the scan lines in order. When the image is displayed with a narrow-viewing angle mode, the second scanning procedure is performed to sequentially scan the Nth scan line of the scan lines to the first scan line of the scan lines in order.