Patents by Inventor Meng-Ku Chen
Meng-Ku Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20150333129Abstract: A method for forming a double step surface on a semiconductor substrate includes, with an etching process used in a Metal-Organic Chemical Vapor Deposition (MOCVD) process, forming a rough surface on a region of a semiconductor substrate. The method further includes, with an annealing process used in the MOCVD process, forming double stepped surface on the region of the semiconductor substrate.Type: ApplicationFiled: July 27, 2015Publication date: November 19, 2015Inventors: Meng-Ku Chen, Hung-Ta Lin
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Patent number: 9184289Abstract: A semiconductor devices and method of formation are provided herein. A semiconductor device includes a gate structure over a channel and an active region adjacent the channel. The active region includes a repaired doped region and a growth region over the repaired doped region. The repaired doped region includes a first dopant and a second dopant, where the second dopant is from the growth region. A method of forming a semiconductor device includes increasing a temperature during exposure to at least one of dopant(s) or agent(s) to form an active region adjacent a channel, where the active region includes a repaired doped region and a growth region over the repaired doped region.Type: GrantFiled: November 8, 2013Date of Patent: November 10, 2015Assignee: Taiwan Semiconductor Manufacturing Company LimitedInventors: Mao-Lin Huang, Chien-Hsun Wang, Chun-Hsiung Lin, Meng-Ku Chen, Li-Ting Wang, Hung-Ta Lin
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Patent number: 9166035Abstract: A transistor includes a gate terminal, a source terminal and a drain terminal. At least one of the source and drain terminals has a layered configuration that includes a terminal layer and an intervening layer. The terminal layer has a top surface and a bottom surface. The intervening layer is located within the terminal layer, between and spaced from the top and bottom surfaces, is oriented to be perpendicular to current flow, and is less than one tenth the thickness of the terminal layer. The terminal layer and the intervening layer include a common semiconductive compound and a common dopant, with a concentration of the dopant in the intervening layer being over ten times an average concentration of the dopant in the terminal layer.Type: GrantFiled: September 12, 2013Date of Patent: October 20, 2015Assignee: Taiwan Semiconductor Manufacturing Company LimitedInventors: Hung-Ta Lin, Mao-Lin Huang, Li-Ting Wang, Chien-Hsun Wang, Meng-Ku Chen, Chun-Hsiung Lin, Pang-Yen Tsai, Hui-Cheng Chang
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Patent number: 9099311Abstract: A method for forming a double step surface on a semiconductor substrate includes, with an etching process used in a Metal-Organic Chemical Vapor Deposition (MOCVD) process, forming a rough surface on a region of a semiconductor substrate. The method further includes, with an annealing process used in the MOCVD process, forming double stepped surface on the region of the semiconductor substrate.Type: GrantFiled: January 31, 2013Date of Patent: August 4, 2015Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Meng-Ku Chen, Hung-Ta Lin, Huicheng Chang
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Publication number: 20150200258Abstract: An embodiment is a method. A first III-V compound semiconductor is epitaxially grown in a trench on a substrate, and the epitaxial growth is performed in a chamber. The first III-V compound semiconductor has a first surface comprising a facet. After the epitaxial growth, the first surface of the first III-V compound semiconductor is etched to form an altered surface of the first III-V compound semiconductor. Etching the first surface is performed in the chamber in situ. A second III-V compound semiconductor is epitaxially grown on the altered surface of the first III-V compound semiconductor. The epitaxial growth of the first III-V compound semiconductor may be performed in a MOCVD chamber, and the etch may use an HCl gas. Structures resulting from methods are also disclosed.Type: ApplicationFiled: March 25, 2015Publication date: July 16, 2015Inventors: Meng-Ku Chen, Hung-Ta Lin, Pang-Yen Tsai, Huicheng Chang
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Publication number: 20150194490Abstract: A method includes epitaxially growing a first III-V compound semiconductor, wherein the first III-V compound semiconductor is of p-type. The first III-V compound semiconductor is grown using precursors including a first precursor comprising Cp2Mg, and a second precursor comprising a donor impurity. A second III-V compound semiconductor is grown overlying and contacting the first III-V compound semiconductor. The second III-V compound semiconductor is of n-type.Type: ApplicationFiled: January 3, 2014Publication date: July 9, 2015Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Meng-Ku Chen, Hung-Ta Lin, Pang-Yen Tsai, Huicheng Chang
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Publication number: 20150129938Abstract: A semiconductor devices and method of formation are provided herein. A semiconductor device includes a gate structure over a channel and an active region adjacent the channel. The active region includes a repaired doped region and a growth region over the repaired doped region. The repaired doped region includes a first dopant and a second dopant, where the second dopant is from the growth region. A method of forming a semiconductor device includes increasing a temperature during exposure to at least one of dopant(s) or agent(s) to form an active region adjacent a channel, where the active region includes a repaired doped region and a growth region over the repaired doped region.Type: ApplicationFiled: November 8, 2013Publication date: May 14, 2015Applicant: Taiwan Semiconductor Manufacturing Company LimitedInventors: Mao-Lin Huang, Chien-Hsun Wang, Chun-Hsiung Lin, Meng-Ku Chen, Li-Ting Wang, Hung-Ta Lin
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Patent number: 9029246Abstract: An embodiment is a method. A first III-V compound semiconductor is epitaxially grown in a trench on a substrate, and the epitaxial growth is performed in a chamber. The first III-V compound semiconductor has a first surface comprising a facet. After the epitaxial growth, the first surface of the first III-V compound semiconductor is etched to form an altered surface of the first III-V compound semiconductor. Etching the first surface is performed in the chamber in situ. A second III-V compound semiconductor is epitaxially grown on the altered surface of the first III-V compound semiconductor. The epitaxial growth of the first III-V compound semiconductor may be performed in a MOCVD chamber, and the etch may use an HCl gas. Structures resulting from methods are also disclosed.Type: GrantFiled: July 30, 2013Date of Patent: May 12, 2015Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Meng-Ku Chen, Hung-Ta Lin, Pang-Yen Tsai, Huicheng Chang
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Publication number: 20150069467Abstract: A transistor includes a gate terminal, a source terminal and a drain terminal. At least one of the source and drain terminals has a layered configuration that includes a terminal layer and an intervening layer. The terminal layer has a top surface and a bottom surface. The intervening layer is located within the terminal layer, between and spaced from the top and bottom surfaces, is oriented to be perpendicular to current flow, and is less than one tenth the thickness of the terminal layer. The terminal layer and the intervening layer include a common semiconductive compound and a common dopant, with a concentration of the dopant in the intervening layer being over ten times an average concentration of the dopant in the terminal layer.Type: ApplicationFiled: September 12, 2013Publication date: March 12, 2015Applicant: Taiwan Semiconductor Manufacturing Company LimitedInventors: HUNG-TA LIN, MAO-LIN HUANG, LI-TING WANG, CHIEN-HSUN WANG, MENG-KU CHEN, CHUN-HSIUNG LIN, PANG-YEN TSAI, HUI-CHENG CHANG
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Publication number: 20150035113Abstract: An embodiment is a method. A first III-V compound semiconductor is epitaxially grown in a trench on a substrate, and the epitaxial growth is performed in a chamber. The first III-V compound semiconductor has a first surface comprising a facet. After the epitaxial growth, the first surface of the first III-V compound semiconductor is etched to form an altered surface of the first III-V compound semiconductor. Etching the first surface is performed in the chamber in situ. A second III-V compound semiconductor is epitaxially grown on the altered surface of the first III-V compound semiconductor. The epitaxial growth of the first III-V compound semiconductor may be performed in a MOCVD chamber, and the etch may use an HCl gas. Structures resulting from methods are also disclosed.Type: ApplicationFiled: July 30, 2013Publication date: February 5, 2015Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Meng-Ku Chen, Hung-Ta Lin, Pang-Yen Tsai, Huicheng Chang
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Patent number: 8822290Abstract: A method includes recessing isolation regions, wherein a portion of a semiconductor strip between the isolation regions is over top surfaces of the recessed isolation regions, and forms a semiconductor fin. A dummy gate is formed to cover a middle portion of the semiconductor fin. An Inter-Layer Dielectric (ILD) is formed to cover end portions of the semiconductor fin. The dummy gate is then removed to form a first recess, wherein the middle portion is exposed to the first recess. The middle portion of the semiconductor fin is removed to form a second recess. An epitaxy is performed to grow a semiconductor material in the second recess, wherein the semiconductor material is between the end portions. A gate dielectric and a gate electrode are formed in the first recess. The gate dielectric and the gate electrode are over the semiconductor material.Type: GrantFiled: January 25, 2013Date of Patent: September 2, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hung-Ta Lin, Meng-Ku Chen, Huicheng Chang
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Publication number: 20140213031Abstract: A method includes recessing isolation regions, wherein a portion of a semiconductor strip between the isolation regions is over top surfaces of the recessed isolation regions, and forms a semiconductor fin. A dummy gate is formed to cover a middle portion of the semiconductor fin. An Inter-Layer Dielectric (ILD) is formed to cover end portions of the semiconductor fin. The dummy gate is then removed to form a first recess, wherein the middle portion is exposed to the first recess. The middle portion of the semiconductor fin is removed to form a second recess. An epitaxy is performed to grow a semiconductor material in the second recess, wherein the semiconductor material is between the end portions. A gate dielectric and a gate electrode are formed in the first recess. The gate dielectric and the gate electrode are over the semiconductor material.Type: ApplicationFiled: January 25, 2013Publication date: July 31, 2014Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Hung-Ta Lin, Meng-Ku Chen, Huicheng Chang
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Publication number: 20140209974Abstract: A method for forming a double step surface on a semiconductor substrate includes, with an etching process used in a Metal-Organic Chemical Vapor Deposition (MOCVD) process, forming a rough surface on a region of a semiconductor substrate. The method further includes, with an annealing process used in the MOCVD process, forming double stepped surface on the region of the semiconductor substrate.Type: ApplicationFiled: January 31, 2013Publication date: July 31, 2014Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Meng-Ku Chen, Hung-Ta Lin, Huicheng Chang